MX6Q_PAD_GPIO_8__UART2_RXD,
MX6Q_PAD_SD4_DAT6__UART2_CTS,
MX6Q_PAD_SD4_DAT5__UART2_RTS,
-#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
/*USBs OC pin */
MX6Q_PAD_EIM_WAIT__GPIO_5_0, /*HOST1_OC*/
MX6Q_PAD_SD4_DAT0__GPIO_2_8, /*OTG_OC*/
MX6Q_PAD_GPIO_19__GPIO_4_5,
MX6Q_PAD_EIM_D24__GPIO_3_24,
+#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
/* eCSPI1 */
MX6Q_PAD_EIM_D16__ECSPI1_SCLK,
MX6Q_PAD_EIM_D17__ECSPI1_MISO,
MX6Q_PAD_EIM_D18__ECSPI1_MOSI,
MX6Q_PAD_EIM_D19__ECSPI1_SS1,
- MX6Q_PAD_EIM_EB2__GPIO_2_30, /*SS0*/
MX6Q_PAD_EIM_D19__GPIO_3_19, /*SS1*/
#else
/* Parallel NOR */
MX6DL_PAD_GPIO_8__UART2_RXD,
MX6DL_PAD_SD4_DAT6__UART2_CTS,
MX6DL_PAD_SD4_DAT5__UART2_RTS,
-#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
/*USBs OC pin */
MX6DL_PAD_EIM_WAIT__GPIO_5_0, /*HOST1_OC*/
MX6DL_PAD_SD4_DAT0__GPIO_2_8, /*OTG_OC*/
MX6DL_PAD_GPIO_19__GPIO_4_5,
MX6DL_PAD_EIM_D24__GPIO_3_24,
+#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
/* eCSPI1 */
MX6DL_PAD_EIM_D16__ECSPI1_SCLK,
MX6DL_PAD_EIM_D17__ECSPI1_MISO,
MX6DL_PAD_EIM_D18__ECSPI1_MOSI,
MX6DL_PAD_EIM_D19__ECSPI1_SS1,
- MX6DL_PAD_EIM_EB2__GPIO_2_30, /*SS0*/
- MX6DL_PAD_EIM_D19__GPIO_3_19, /*SS1*/
+
+ MX6DL_PAD_EIM_D19__GPIO_3_19,
#else
/* Parallel NOR */
MX6DL_PAD_EIM_OE__WEIM_WEIM_OE,