ARM: 8232/1: sa1100: merge GPIO multiplexer IRQ to "normal" irq domain

IRQ_GPIO11_27 is a shared IRQ receiving IRQs from "high" GPIOs. It is
still handled by sa1100_normal_chip, so there is no point to exclude it
from "normal" irq domain. The IRQF_VALID flag set by domain map function
will be cleared by irq_set_chained_handler() internally.

Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

diff --git a/arch/arm/mach-sa1100/irq.c b/arch/arm/mach-sa1100/irq.c
index 2d8be038b039f018fbd3af5d94545d1735f42d0e..14a7633e3cbe0e4b50ab694f37f4e51531f28724 100644 (file)
--- a/arch/arm/mach-sa1100/irq.c
+++ b/arch/arm/mach-sa1100/irq.c
@@ -387,7 +387,7 @@ void __init sa1100_init_irq(void)
                        &sa1100_low_gpio_irqdomain_ops, NULL);
 
        sa1100_normal_irqdomain = irq_domain_add_legacy(NULL,
-                       20, IRQ_LCD, 12,
+                       21, IRQ_GPIO11_27, 11,
                        &sa1100_normal_irqdomain_ops, NULL);
 
        sa1100_high_gpio_irqdomain = irq_domain_add_legacy(NULL,
@@ -397,7 +397,6 @@ void __init sa1100_init_irq(void)
        /*
         * Install handler for GPIO 11-27 edge detect interrupts
         */
-       irq_set_chip(IRQ_GPIO11_27, &sa1100_normal_chip);
        irq_set_chained_handler(IRQ_GPIO11_27, sa1100_high_gpio_handler);
 
        set_handle_irq(sa1100_handle_irq);