ARM: dtsi: enable ahci sata on imx6q platforms

Only imx6q has the ahci sata controller, enable
it on imx6q platforms.

Signed-off-by: Richard Zhu <r65037@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

diff --git a/arch/arm/boot/dts/imx6q-sabreauto.dts b/arch/arm/boot/dts/imx6q-sabreauto.dts
index 9e634ccb798fe16ae13696409d33dd0c55f6c56d..334b9247e78cefff1e5e30e4d033cad89c5d5d11 100644 (file)
--- a/arch/arm/boot/dts/imx6q-sabreauto.dts
+++ b/arch/arm/boot/dts/imx6q-sabreauto.dts
@@ -19,3 +19,7 @@
        model = "Freescale i.MX6 Quad SABRE Automotive Board";
        compatible = "fsl,imx6q-sabreauto", "fsl,imx6q";
 };
+
+&sata {
+       status = "okay";
+};

diff --git a/arch/arm/boot/dts/imx6q-sabrelite.dts b/arch/arm/boot/dts/imx6q-sabrelite.dts
index 38b8aeac5c563bf1fb6ffd63abcdae1b5c8ab554..e0f4cd041c7018f3ad68bebdf461652953d2b8d6 100644 (file)
--- a/arch/arm/boot/dts/imx6q-sabrelite.dts
+++ b/arch/arm/boot/dts/imx6q-sabrelite.dts
@@ -65,6 +65,10 @@
        };
 };
 
+&sata {
+       status = "okay";
+};
+
 &ecspi1 {
        fsl,spi-num-chipselects = <1>;
        cs-gpios = <&gpio3 19 0>;

diff --git a/arch/arm/boot/dts/imx6q-sabresd.dts b/arch/arm/boot/dts/imx6q-sabresd.dts
index 5e62c2427b0771c9b38425b05c957c4660ff9816..9cbdfe7a0931ff4fa8c09db3c9ea0fa3bb397609 100644 (file)
--- a/arch/arm/boot/dts/imx6q-sabresd.dts
+++ b/arch/arm/boot/dts/imx6q-sabresd.dts
@@ -19,3 +19,7 @@
        model = "Freescale i.MX6 Quad SABRE Smart Device Board";
        compatible = "fsl,imx6q-sabresd", "fsl,imx6q";
 };
+
+&sata {
+       status = "okay";
+};

diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index f492c620c9f241917cc2b0f229cd77756e36acdd..76a84e80a1ab7836e468c3e8ea6515392c4d2098 100644 (file)
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -116,6 +116,15 @@
                        };
                };
 
+               sata: sata@02200000 {
+                       compatible = "fsl,imx6q-ahci";
+                       reg = <0x02200000 0x4000>;
+                       interrupts = <0 39 0x04>;
+                       clocks =  <&clks 154>, <&clks 187>, <&clks 105>;
+                       clock-names = "sata", "sata_ref", "ahb";
+                       status = "disabled";
+               };
+
                ipu2: ipu@02800000 {
                        #crtc-cells = <1>;
                        compatible = "fsl,imx6q-ipu";