]> git.karo-electronics.de Git - mv-sheeva.git/commitdiff
sisfb: delete unused register I/O macros
authorAaro Koskinen <aaro.koskinen@iki.fi>
Mon, 20 Dec 2010 21:50:21 +0000 (23:50 +0200)
committerPaul Mundt <lethal@linux-sh.org>
Wed, 22 Dec 2010 03:57:23 +0000 (12:57 +0900)
Delete unused register I/O macros.

Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Cc: Thomas Winischhofer <thomas@winischhofer.net>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
drivers/video/sis/sis.h

index acf0766c4dbf4974bd5fe5efd977bbbd5f7f6ade..eac7a01925f3d26e03ab33cc2650a76278993391 100644 (file)
 #define VB2_LCDOVER1600BRIDGE  (VB2_307T  | VB2_307LV)
 #define VB2_RAMDAC202MHZBRIDGE (VB2_301C  | VB2_307T)
 
-/* I/O port access macros and functions */
+/* I/O port access functions */
 
 void SiS_SetReg(SISIOADDRESS, u8, u8);
 void SiS_SetRegByte(SISIOADDRESS, u8);
@@ -321,58 +321,6 @@ u8 SiS_GetRegByte(SISIOADDRESS);
 u16 SiS_GetRegShort(SISIOADDRESS);
 u32 SiS_GetRegLong(SISIOADDRESS);
 
-#define inSISREG(base)         inb(base)
-
-#define outSISREG(base,val)    outb(val,base)
-
-#define orSISREG(base,val)                             \
-               do {                                    \
-                       u8 __Temp = inSISREG(base);     \
-                       outSISREG(base, __Temp | (val));\
-               } while (0)
-
-#define andSISREG(base,val)                            \
-               do {                                    \
-                       u8 __Temp = inSISREG(base);     \
-                       outSISREG(base, __Temp & (val));\
-               } while (0)
-
-#define inSISIDXREG(base,idx,var)                      \
-               do {                                    \
-                       outSISREG(base, idx);           \
-                       var = inSISREG((base)+1);       \
-               } while (0)
-
-#define outSISIDXREG(base,idx,val)                     \
-               do {                                    \
-                       outSISREG(base, idx);           \
-                       outSISREG((base)+1, val);       \
-               } while (0)
-
-#define orSISIDXREG(base,idx,val)                              \
-               do {                                            \
-                       u8 __Temp;                              \
-                       outSISREG(base, idx);                   \
-                       __Temp = inSISREG((base)+1) | (val);    \
-                       outSISREG((base)+1, __Temp);            \
-               } while (0)
-
-#define andSISIDXREG(base,idx,and)                             \
-               do {                                            \
-                       u8 __Temp;                              \
-                       outSISREG(base, idx);                   \
-                       __Temp = inSISREG((base)+1) & (and);    \
-                       outSISREG((base)+1, __Temp);            \
-               } while (0)
-
-#define setSISIDXREG(base,idx,and,or)                                  \
-               do {                                                    \
-                       u8 __Temp;                                      \
-                       outSISREG(base, idx);                           \
-                       __Temp = (inSISREG((base)+1) & (and)) | (or);   \
-                       outSISREG((base)+1, __Temp);                    \
-               } while (0)
-
 /* MMIO access macros */
 #define MMIO_IN8(base, offset)  readb((base+offset))
 #define MMIO_IN16(base, offset) readw((base+offset))