struct chip_data *chip = spi_get_ctldata(spi);
u8 imask = 0;
u16 txlevel = 0;
- u16 clk_div;
u32 cr0;
int ret;
spi_enable_chip(dws, 0);
/* Handle per transfer options for bpw and speed */
- if (transfer->speed_hz != chip->speed_hz) {
- /* clk_div doesn't support odd number */
- clk_div = (dws->max_freq / transfer->speed_hz + 1) & 0xfffe;
-
- chip->speed_hz = transfer->speed_hz;
- chip->clk_div = clk_div;
-
+ if (transfer->speed_hz != dws->current_freq) {
+ if (transfer->speed_hz != chip->speed_hz) {
+ /* clk_div doesn't support odd number */
+ chip->clk_div = (dws->max_freq / transfer->speed_hz + 1) & 0xfffe;
+ chip->speed_hz = transfer->speed_hz;
+ }
+ dws->current_freq = transfer->speed_hz;
spi_set_clk(dws, chip->clk_div);
}
if (transfer->bits_per_word == 8) {
u8 n_bytes; /* current is a 1/2 bytes op */
u32 dma_width;
irqreturn_t (*transfer_handler)(struct dw_spi *dws);
+ u32 current_freq; /* frequency in hz */
/* DMA info */
int dma_inited;