.pll_rate = 1200000000,
.cpu_rate = 1200000000,
.cpu_podf = 0,
- .pu_voltage = 1250000,
- .soc_voltage = 1250000,
+ .pu_voltage = 1275000,
+ .soc_voltage = 1275000,
.cpu_voltage = 1275000,},
{
.pll_rate = 792000000,
.cpu_podf = 0,
#ifdef CONFIG_MX6_VPU_352M
/*VPU 352Mhz need voltage 1.25V*/
- .pu_voltage = 1250000,
- .soc_voltage = 1250000,
+ .pu_voltage = 1250000,
+ .soc_voltage = 1250000,
#else
- .pu_voltage = 1150000,
- .soc_voltage = 1150000,
+ .pu_voltage = 1175000,
+ .soc_voltage = 1175000,
#endif
- .cpu_voltage = 1100000,},
+ .cpu_voltage = 1150000,},
#ifdef CONFIG_MX6_VPU_352M
/*pll2_pfd_400M will be fix on 352M,to avoid modify other code
which assume ARM clock sourcing from pll2_pfd_400M, change cpu
.cpu_podf = 0,
.pu_voltage = 1250000,
.soc_voltage = 1250000,
- .cpu_voltage = 925000,},
+ .cpu_voltage = 950000,},
#else
{
.pll_rate = 396000000,
.cpu_rate = 396000000,
.cpu_podf = 0,
- .pu_voltage = 1150000,
- .soc_voltage = 1150000,
- .cpu_voltage = 925000,},
+ .pu_voltage = 1175000,
+ .soc_voltage = 1175000,
+ .cpu_voltage = 950000,},
#endif
};
.pll_rate = 996000000,
.cpu_rate = 996000000,
.cpu_podf = 0,
- .pu_voltage = 1200000,
- .soc_voltage = 1200000,
- .cpu_voltage = 1225000,},
+ .pu_voltage = 1250000,
+ .soc_voltage = 1250000,
+ .cpu_voltage = 1250000,},
{
.pll_rate = 792000000,
.cpu_rate = 792000000,
.pu_voltage = 1250000,
.soc_voltage = 1250000,
#else
- .pu_voltage = 1150000,
- .soc_voltage = 1150000,
+ .pu_voltage = 1175000,
+ .soc_voltage = 1175000,
#endif
- .cpu_voltage = 1100000,},
+ .cpu_voltage = 1150000,},
#ifdef CONFIG_MX6_VPU_352M
/*pll2_pfd_400M will be fix on 352M,to avoid modify other code
which assume ARM clock sourcing from pll2_pfd_400M, change cpu
.cpu_podf = 0,
.pu_voltage = 1250000,
.soc_voltage = 1250000,
- .cpu_voltage = 925000,},
+ .cpu_voltage = 950000,},
#else
{
.pll_rate = 396000000,
.cpu_rate = 396000000,
.cpu_podf = 0,
- .pu_voltage = 1150000,
- .soc_voltage = 1150000,
- .cpu_voltage = 925000,},
+ .pu_voltage = 1175000,
+ .soc_voltage = 1175000,
+ .cpu_voltage = 950000,},
#endif
};
.pu_voltage = 1250000,
.soc_voltage = 1250000,
#else
- .pu_voltage = 1150000,
- .soc_voltage = 1150000,
+ .pu_voltage = 1175000,
+ .soc_voltage = 1175000,
#endif
- .cpu_voltage = 1100000,},
+ .cpu_voltage = 1150000,},
#ifdef CONFIG_MX6_VPU_352M
/*pll2_pfd_400M will be fix on 352M,to avoid modify other code
which assume ARM clock sourcing from pll2_pfd_400M, change cpu
.cpu_podf = 0,
.pu_voltage = 1250000,
.soc_voltage = 1250000,
- .cpu_voltage = 925000,},
+ .cpu_voltage = 950000,},
#else
{
.pll_rate = 396000000,
.cpu_rate = 396000000,
.cpu_podf = 0,
- .pu_voltage = 1150000,
- .soc_voltage = 1150000,
- .cpu_voltage = 925000,},
+ .pu_voltage = 1175000,
+ .soc_voltage = 1175000,
+ .cpu_voltage = 950000,},
#endif
};
.pll_rate = 1200000000,
.cpu_rate = 1200000000,
.cpu_podf = 0,
- .pu_voltage = 1250000,
- .soc_voltage = 1250000,
+ .pu_voltage = 1275000,
+ .soc_voltage = 1275000,
.cpu_voltage = 1275000,},
{
.pll_rate = 792000000,
.cpu_rate = 792000000,
.cpu_podf = 0,
- .pu_voltage = 1150000,
- .soc_voltage = 1150000,
- .cpu_voltage = 1100000,},
+ .pu_voltage = 1175000,
+ .soc_voltage = 1175000,
+ .cpu_voltage = 1150000,},
{
.pll_rate = 396000000,
.cpu_rate = 396000000,
.cpu_podf = 0,
- .pu_voltage = 1150000,
- .soc_voltage = 1150000,
- .cpu_voltage = 1025000,},
- {
- .pll_rate = 396000000,
- .cpu_rate = 198000000,
- .cpu_podf = 1,
- .pu_voltage = 1150000,
- .soc_voltage = 1150000,
- .cpu_voltage = 1025000,},
+ .pu_voltage = 1175000,
+ .soc_voltage = 1175000,
+ .cpu_voltage = 1075000,},
};
/* working point(wp): 0 - 1GHz; 1 - 800MHz, 2 - 400MHz, 3 - 200MHz */
static struct cpu_op mx6dl_cpu_op_1G[] = {
.pll_rate = 996000000,
.cpu_rate = 996000000,
.cpu_podf = 0,
- .pu_voltage = 1200000,
- .soc_voltage = 1200000,
- .cpu_voltage = 1225000,},
+ .pu_voltage = 1250000,
+ .soc_voltage = 1250000,
+ .cpu_voltage = 1250000,},
{
.pll_rate = 792000000,
.cpu_rate = 792000000,
.cpu_podf = 0,
- .pu_voltage = 1150000,
- .soc_voltage = 1150000,
- .cpu_voltage = 1100000,},
+ .pu_voltage = 1175000,
+ .soc_voltage = 1175000,
+ .cpu_voltage = 1150000,},
{
.pll_rate = 396000000,
.cpu_rate = 396000000,
.cpu_podf = 0,
- .pu_voltage = 1150000,
- .soc_voltage = 1150000,
- .cpu_voltage = 1025000,},
- {
- .pll_rate = 396000000,
- .cpu_rate = 198000000,
- .cpu_podf = 1,
- .pu_voltage = 1150000,
- .soc_voltage = 1150000,
- .cpu_voltage = 1025000,},
+ .pu_voltage = 1175000,
+ .soc_voltage = 1175000,
+ .cpu_voltage = 1075000,},
};
static struct cpu_op mx6dl_cpu_op[] = {
{
.pll_rate = 792000000,
.cpu_rate = 792000000,
.cpu_podf = 0,
- .pu_voltage = 1150000,
- .soc_voltage = 1150000,
- .cpu_voltage = 1100000,},
+ .pu_voltage = 1175000,
+ .soc_voltage = 1175000,
+ .cpu_voltage = 1150000,},
{
.pll_rate = 396000000,
.cpu_rate = 396000000,
.cpu_podf = 0,
- .pu_voltage = 1150000,
- .soc_voltage = 1150000,
- .cpu_voltage = 1025000,},
- {
- .pll_rate = 396000000,
- .cpu_rate = 198000000,
- .cpu_podf = 1,
- .pu_voltage = 1150000,
- .soc_voltage = 1150000,
- .cpu_voltage = 1025000,},
+ .pu_voltage = 1175000,
+ .soc_voltage = 1175000,
+ .cpu_voltage = 1075000,},
};
static struct cpu_op mx6sl_cpu_op_1G[] = {