ENGR00223097 sabresd pfuze:increase VDDARM_IN&VDDSOC_IN to 1.475V for 1.2G

consider ripple, IR drop and pfuze tolerance, we need incrase VDDARM_IN and
VDDSOC_IN to 1.475V.

Signed-off-by: Robin Gong <B38343@freescale.com>

diff --git a/arch/arm/mach-mx6/mx6q_sabresd_pmic_pfuze100.c b/arch/arm/mach-mx6/mx6q_sabresd_pmic_pfuze100.c
index 69daddf14000345475afa34b9f5acd03468e4721..cbde44955f03c25ef5b06f8edaf289bf5c4a245f 100644 (file)
--- a/arch/arm/mach-mx6/mx6q_sabresd_pmic_pfuze100.c
+++ b/arch/arm/mach-mx6/mx6q_sabresd_pmic_pfuze100.c
@@ -402,16 +402,16 @@ static int pfuze100_init(struct mc_pfuze *pfuze)
        int ret;
        unsigned int reg;
        if (arm_max_freq == CPU_AT_1_2GHz) {
-               /*VDDARM_IN 1.425V*/
+               /*VDDARM_IN 1.475V*/
                ret = pfuze_reg_rmw(pfuze, PFUZE100_SW1AVOL,
                                        PFUZE100_SW1AVOL_VSEL_M,
-                                       0x2d);
+                                       0x2f);
                if (ret)
                        goto err;
-               /*VDDSOC_IN 1.425V*/
+               /*VDDSOC_IN 1.475V*/
                ret = pfuze_reg_rmw(pfuze, PFUZE100_SW1CVOL,
                                        PFUZE100_SW1CVOL_VSEL_M,
-                                       0x2d);
+                                       0x2f);
                if (ret)
                        goto err;
                /*set VDDSOC&VDDPU to 1.25V*/