]> git.karo-electronics.de Git - linux-beck.git/commitdiff
ARM: dts: porter: Enable SCIF_CLK frequency and pins
authorGeert Uytterhoeven <geert+renesas@glider.be>
Fri, 29 Jan 2016 10:17:24 +0000 (11:17 +0100)
committerSimon Horman <horms+renesas@verge.net.au>
Tue, 9 Feb 2016 18:43:28 +0000 (19:43 +0100)
Add and enable the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.

This increases the range and accuracy of supported baud rates.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
arch/arm/boot/dts/r8a7791-porter.dts

index 5015eaa0ae50039ea1875e050b85df01a7218bc4..ed1f6f884e2b216885efb98dd9460d76df7dc768 100644 (file)
 };
 
 &pfc {
+       pinctrl-0 = <&scif_clk_pins>;
+       pinctrl-names = "default";
+
        scif0_pins: serial0 {
                renesas,groups = "scif0_data_d";
                renesas,function = "scif0";
        };
 
+       scif_clk_pins: scif_clk {
+               renesas,groups = "scif_clk";
+               renesas,function = "scif_clk";
+       };
+
        ether_pins: ether {
                renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
                renesas,function = "eth";
        status = "okay";
 };
 
+&scif_clk {
+       clock-frequency = <14745600>;
+       status = "okay";
+};
+
 &ether {
        pinctrl-0 = <&ether_pins &phy1_pins>;
        pinctrl-names = "default";