config FB_XILINX
tristate "Xilinx frame buffer support"
- depends on FB && (XILINX_VIRTEX || MICROBLAZE)
+ depends on FB && (XILINX_VIRTEX || MICROBLAZE || ARCH_ZYNQ)
select FB_CFB_FILLRECT
select FB_CFB_COPYAREA
select FB_CFB_IMAGEBLIT
aty128_init_engine(par);
- par->pm_reg = pci_find_capability(pdev, PCI_CAP_ID_PM);
+ par->pm_reg = pdev->pm_cap;
par->pdev = pdev;
par->asleep = 0;
par->lock_blank = 0;
#include <linux/slab.h>
#include <linux/vmalloc.h>
#include <linux/delay.h>
+#include <linux/compiler.h>
#include <linux/console.h>
#include <linux/fb.h>
#include <linux/init.h>
const char *name;
int i;
- for (i = ARRAY_SIZE(aty_chips) - 1; i >= 0; i--)
- if (par->pci_id == aty_chips[i].pci_id)
+ for (i = ARRAY_SIZE(aty_chips); i > 0; i--)
+ if (par->pci_id == aty_chips[i - 1].pci_id)
break;
if (i < 0)
return 0;
}
-static char ram_dram[] = "DRAM";
-static char ram_resv[] = "RESV";
+static char ram_dram[] __maybe_unused = "DRAM";
+static char ram_resv[] __maybe_unused = "RESV";
#ifdef CONFIG_FB_ATY_GX
static char ram_vram[] = "VRAM";
#endif /* CONFIG_FB_ATY_GX */
void radeonfb_pm_init(struct radeonfb_info *rinfo, int dynclk, int ignore_devlist, int force_sleep)
{
/* Find PM registers in config space if any*/
- rinfo->pm_reg = pci_find_capability(rinfo->pdev, PCI_CAP_ID_PM);
+ rinfo->pm_reg = rinfo->pdev->pm_cap;
/* Enable/Disable dynamic clocks: TODO add sysfs access */
if (rinfo->family == CHIP_FAMILY_RS480)
if (fbdev->info.cmap.len != 0) {
fb_dealloc_cmap(&fbdev->info.cmap);
}
- platform_set_drvdata(dev, NULL);
return -ENODEV;
}
out2:
free_dma(CH_EPPI0);
out1:
- platform_set_drvdata(pdev, NULL);
return ret;
}
return lq035q1_control(spi, LQ035_SHUT_CTL, LQ035_SHUT);
}
-#ifdef CONFIG_PM
-static int lq035q1_spidev_suspend(struct spi_device *spi, pm_message_t state)
+#ifdef CONFIG_PM_SLEEP
+static int lq035q1_spidev_suspend(struct device *dev)
{
+ struct spi_device *spi = to_spi_device(dev);
+
return lq035q1_control(spi, LQ035_SHUT_CTL, LQ035_SHUT);
}
-static int lq035q1_spidev_resume(struct spi_device *spi)
+static int lq035q1_spidev_resume(struct device *dev)
{
- int ret;
+ struct spi_device *spi = to_spi_device(dev);
struct spi_control *ctl = spi_get_drvdata(spi);
+ int ret;
ret = lq035q1_control(spi, LQ035_DRIVER_OUTPUT_CTL, ctl->mode);
if (ret)
return lq035q1_control(spi, LQ035_SHUT_CTL, LQ035_ON);
}
+
+static SIMPLE_DEV_PM_OPS(lq035q1_spidev_pm_ops, lq035q1_spidev_suspend,
+ lq035q1_spidev_resume);
+#define LQ035Q1_SPIDEV_PM_OPS (&lq035q1_spidev_pm_ops)
+
#else
-# define lq035q1_spidev_suspend NULL
-# define lq035q1_spidev_resume NULL
+#define LQ035Q1_SPIDEV_PM_OPS NULL
#endif
/* Power down all displays on reboot, poweroff or halt */
info->spidrv.probe = lq035q1_spidev_probe;
info->spidrv.remove = lq035q1_spidev_remove;
info->spidrv.shutdown = lq035q1_spidev_shutdown;
- info->spidrv.suspend = lq035q1_spidev_suspend;
- info->spidrv.resume = lq035q1_spidev_resume;
+ info->spidrv.driver.pm = LQ035Q1_SPIDEV_PM_OPS;
ret = spi_register_driver(&info->spidrv);
if (ret < 0) {
out2:
free_dma(CH_PPI);
out1:
- platform_set_drvdata(pdev, NULL);
return ret;
}
bfin_lq035q1_free_ports(info->disp_info->ppi_mode ==
USE_RGB565_16_BIT_PPI);
- platform_set_drvdata(pdev, NULL);
framebuffer_release(fbinfo);
dev_info(&pdev->dev, "unregistered LCD driver\n");
out2:
free_dma(CH_PPI);
out1:
- platform_set_drvdata(pdev, NULL);
return ret;
}
bfin_t350mcqb_request_ports(0);
- platform_set_drvdata(pdev, NULL);
framebuffer_release(fbinfo);
printk(KERN_INFO DRIVER_NAME ": Unregister LCD driver.\n");
fb_dealloc_cmap(&info->cmap);
failed_cmap:
kfree(info);
- platform_set_drvdata(pdev, NULL);
return err;
}
fbi->mach_info->teardown(pdev);
kfree(info);
- platform_set_drvdata(pdev, NULL);
return 0;
}
err |= copy_to_user(fix32->reserved, fix->reserved,
sizeof(fix->reserved));
- return err;
+ if (err)
+ return -EFAULT;
+ return 0;
}
static int fb_get_fscreeninfo(struct fb_info *info, unsigned int cmd,
unsigned long val;
if (s) {
- if (!strict_strtoul(s, 10, &val) && (val <= 2))
+ if (!kstrtoul(s, 10, &val) && (val <= 2))
port = (enum fsl_diu_monitor_port) val;
else if (strncmp(s, "lvds", 4) == 0)
port = FSL_DIU_PORT_LVDS;
if (!strncmp(opt, "monitor=", 8)) {
monitor_port = fsl_diu_name_to_port(opt + 8);
} else if (!strncmp(opt, "bpp=", 4)) {
- if (!strict_strtoul(opt + 4, 10, &val))
+ if (!kstrtoul(opt + 4, 10, &val))
default_bpp = val;
} else
fb_mode = opt;
}
#endif
-int __init i740fb_init(void)
+static int __init i740fb_init(void)
{
#ifndef MODULE
char *option = NULL;
failed_req:
kfree(info->pseudo_palette);
failed_init:
- platform_set_drvdata(pdev, NULL);
framebuffer_release(info);
return ret;
}
iounmap(fbi->regs);
release_mem_region(res->start, resource_size(res));
- platform_set_drvdata(pdev, NULL);
-
return 0;
}
-void imxfb_shutdown(struct platform_device * dev)
+static void imxfb_shutdown(struct platform_device *dev)
{
struct fb_info *info = platform_get_drvdata(dev);
struct imxfb_info *fbi = info->par;
return 0;
}
-int __init imxfb_init(void)
+static int __init imxfb_init(void)
{
int ret = imxfb_setup();
fb_dealloc_cmap(&jzfb->fb->cmap);
jzfb_free_devmem(jzfb);
- platform_set_drvdata(pdev, NULL);
-
framebuffer_release(jzfb->fb);
return 0;
mutex_destroy(&fbi->access_ok);
failed:
dev_err(fbi->dev, "mmp-fb: frame buffer device init failed\n");
- platform_set_drvdata(pdev, NULL);
framebuffer_release(info);
devm_kfree(ctrl->dev, ctrl);
}
- platform_set_drvdata(pdev, NULL);
dev_err(&pdev->dev, "device init failed\n");
return ret;
host->base = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(host->base)) {
- dev_err(&pdev->dev, "ioremap failed\n");
ret = PTR_ERR(host->base);
goto fb_release;
}
framebuffer_release(fb_info);
- platform_set_drvdata(pdev, NULL);
-
return 0;
}
release_resource(fbi->mem);
kfree(fbi->mem);
- platform_set_drvdata(pdev, NULL);
framebuffer_release(fbinfo);
return 0;
unsigned long t;
int r;
- r = strict_strtoul(buf, 10, &t);
+ r = kstrtoul(buf, 10, &t);
if (r)
return r;
unsigned long t;
int r;
- r = strict_strtoul(buf, 10, &t);
+ r = kstrtoul(buf, 10, &t);
if (r)
return r;
unsigned long t;
int r;
- r = strict_strtoul(buf, 10, &t);
+ r = kstrtoul(buf, 10, &t);
if (r)
return r;
* shifted. So skip all odd dividers when the pixel clock is on the
* higher side.
*/
- if (ctx->pck_min >= 1000000) {
+ if (ctx->pck_min >= 100000000) {
if (lckd > 1 && lckd % 2 != 0)
return false;
* shifted. So skip all odd dividers when the pixel clock is on the
* higher side.
*/
- if (regm_dispc > 1 && regm_dispc % 2 != 0 && ctx->pck_min >= 1000000)
+ if (regm_dispc > 1 && regm_dispc % 2 != 0 && ctx->pck_min >= 100000000)
return false;
ctx->dsi_cinfo.regm_dispc = regm_dispc;
misc_deregister(&priv->misc_dev);
err_free_priv:
- platform_set_drvdata(dev, NULL);
free_buffers(dev, priv);
kfree(priv);
return ret;
priv->shared, priv->shared_phys);
iounmap(priv->mmio_base);
release_mem_region(r->start, resource_size(r));
- platform_set_drvdata(dev, NULL);
clk_disable(priv->clk);
free_buffers(dev, priv);
kfree(priv);
release_mem_region(r->start, resource_size(r));
failed_fbi:
clk_put(fbi->clk);
- platform_set_drvdata(dev, NULL);
kfree(fbi);
failed:
return ret;
release_mem:
release_mem_region(res->start, size);
dealloc_fb:
- platform_set_drvdata(pdev, NULL);
framebuffer_release(fbinfo);
return ret;
}
release_mem_region(info->mem->start, resource_size(info->mem));
- platform_set_drvdata(pdev, NULL);
framebuffer_release(fbinfo);
return 0;
failed:
if (fbi)
iounmap(fbi->base);
- platform_set_drvdata(pdev, NULL);
kfree(fbi);
release_mem_region(res->start, resource_size(res));
return ret;
iounmap(par->base);
release_mem_region(par->ioarea->start, resource_size(par->ioarea));
framebuffer_release(info);
- platform_set_drvdata(dev, NULL);
return 0;
}
iounmap(mipi->base);
if (res)
release_mem_region(res->start, resource_size(res));
- platform_set_drvdata(pdev, NULL);
kfree(mipi);
return 0;
{
struct usb_device *usbdev;
struct ufx_data *dev;
- struct fb_info *info = 0;
+ struct fb_info *info = NULL;
int retval = -ENOMEM;
u32 id_rev, fpga_rev;
cell->disable(dev);
err_enable:
err_find_mode:
- platform_set_drvdata(dev, NULL);
free_irq(irq, info);
err_request_irq:
iounmap(info->screen_base);
if (cell->disable)
cell->disable(dev);
- platform_set_drvdata(dev, NULL);
-
free_irq(irq, info);
iounmap(info->screen_base);
while ((pixel_end > pixel) &&
(cmd_buffer_end - MIN_RLX_CMD_BYTES > cmd)) {
- uint8_t *raw_pixels_count_byte = 0;
- uint8_t *cmd_pixels_count_byte = 0;
- const uint16_t *raw_pixel_start = 0;
- const uint16_t *cmd_pixel_start, *cmd_pixel_end = 0;
+ uint8_t *raw_pixels_count_byte = NULL;
+ uint8_t *cmd_pixels_count_byte = NULL;
+ const uint16_t *raw_pixel_start = NULL;
+ const uint16_t *cmd_pixel_start, *cmd_pixel_end = NULL;
prefetchw((void *) cmd); /* pull in one cache line at least */
return 0;
}
-int dlfb_handle_damage(struct dlfb_data *dev, int x, int y,
+static int dlfb_handle_damage(struct dlfb_data *dev, int x, int y,
int width, int height, char *data)
{
int i, ret;
const struct usb_device_id *id)
{
struct usb_device *usbdev;
- struct dlfb_data *dev = 0;
+ struct dlfb_data *dev = NULL;
int retval = -ENOMEM;
/* usb initialization */
if (par->pmi_setpal || par->ypan) {
if (__supported_pte_mask & _PAGE_NX) {
par->pmi_setpal = par->ypan = 0;
- printk(KERN_WARNING "uvesafb: NX protection is actively."
- "We have better not to use the PMI.\n");
+ printk(KERN_WARNING "uvesafb: NX protection is active, "
+ "better not use the PMI.\n");
} else {
uvesafb_vbe_getpmi(task, par);
}
iounmap(info->screen_base);
fb_dealloc_cmap(&info->cmap);
/* XXX unshare VGA regions */
- platform_set_drvdata(dev, NULL);
framebuffer_release(info);
}
failed_free_res:
release_mem_region(res->start, resource_size(res));
failed_fbi:
- platform_set_drvdata(pdev, NULL);
kfree(fbi);
failed:
return ret;
struct wm8505fb_info *fbi = to_wm8505fb_info(info);
unsigned long tmp;
- if (strict_strtoul(buf, 10, &tmp) || (tmp > 0xff))
+ if (kstrtoul(buf, 10, &tmp) || (tmp > 0xff))
return -EINVAL;
fbi->contrast = tmp;
/*
- * Xilinx calls it "PLB TFT LCD Controller" though it can also be used for
+ * Xilinx calls it "TFT LCD Controller" though it can also be used for
* the VGA port on the Xilinx ML40x board. This is a hardware display
* controller for a 640x480 resolution TFT or VGA screen.
*
* don't start thinking about scrolling). The second allows the LCD to
* be turned on or off as well as rotated 180 degrees.
*
- * In case of direct PLB access the second control register will be at
+ * In case of direct BUS access the second control register will be at
* an offset of 4 as compared to the DCR access where the offset is 1
* i.e. REG_CTRL. So this is taken care in the function
- * xilinx_fb_out_be32 where it left shifts the offset 2 times in case of
- * direct PLB access.
+ * xilinx_fb_out32 where it left shifts the offset 2 times in case of
+ * direct BUS access.
*/
#define NUM_REGS 2
#define REG_FB_ADDR 0
};
-#define PLB_ACCESS_FLAG 0x1 /* 1 = PLB, 0 = DCR */
+#define BUS_ACCESS_FLAG 0x1 /* 1 = BUS, 0 = DCR */
+#define LITTLE_ENDIAN_ACCESS 0x2 /* LITTLE ENDIAN IO functions */
struct xilinxfb_drvdata {
container_of(_info, struct xilinxfb_drvdata, info)
/*
- * The XPS TFT Controller can be accessed through PLB or DCR interface.
+ * The XPS TFT Controller can be accessed through BUS or DCR interface.
* To perform the read/write on the registers we need to check on
* which bus its connected and call the appropriate write API.
*/
-static void xilinx_fb_out_be32(struct xilinxfb_drvdata *drvdata, u32 offset,
+static void xilinx_fb_out32(struct xilinxfb_drvdata *drvdata, u32 offset,
u32 val)
{
- if (drvdata->flags & PLB_ACCESS_FLAG)
- out_be32(drvdata->regs + (offset << 2), val);
+ if (drvdata->flags & BUS_ACCESS_FLAG) {
+ if (drvdata->flags & LITTLE_ENDIAN_ACCESS)
+ iowrite32(val, drvdata->regs + (offset << 2));
+ else
+ iowrite32be(val, drvdata->regs + (offset << 2));
+ }
#ifdef CONFIG_PPC_DCR
else
dcr_write(drvdata->dcr_host, offset, val);
#endif
}
+static u32 xilinx_fb_in32(struct xilinxfb_drvdata *drvdata, u32 offset)
+{
+ if (drvdata->flags & BUS_ACCESS_FLAG) {
+ if (drvdata->flags & LITTLE_ENDIAN_ACCESS)
+ return ioread32(drvdata->regs + (offset << 2));
+ else
+ return ioread32be(drvdata->regs + (offset << 2));
+ }
+#ifdef CONFIG_PPC_DCR
+ else
+ return dcr_read(drvdata->dcr_host, offset);
+#endif
+ return 0;
+}
+
static int
xilinx_fb_setcolreg(unsigned regno, unsigned red, unsigned green, unsigned blue,
unsigned transp, struct fb_info *fbi)
switch (blank_mode) {
case FB_BLANK_UNBLANK:
/* turn on panel */
- xilinx_fb_out_be32(drvdata, REG_CTRL, drvdata->reg_ctrl_default);
+ xilinx_fb_out32(drvdata, REG_CTRL, drvdata->reg_ctrl_default);
break;
case FB_BLANK_NORMAL:
case FB_BLANK_HSYNC_SUSPEND:
case FB_BLANK_POWERDOWN:
/* turn off panel */
- xilinx_fb_out_be32(drvdata, REG_CTRL, 0);
+ xilinx_fb_out32(drvdata, REG_CTRL, 0);
default:
break;
* Bus independent setup/teardown
*/
-static int xilinxfb_assign(struct device *dev,
+static int xilinxfb_assign(struct platform_device *pdev,
struct xilinxfb_drvdata *drvdata,
- unsigned long physaddr,
struct xilinxfb_platform_data *pdata)
{
int rc;
+ struct device *dev = &pdev->dev;
int fbsize = pdata->xvirt * pdata->yvirt * BYTES_PER_PIXEL;
- if (drvdata->flags & PLB_ACCESS_FLAG) {
- /*
- * Map the control registers in if the controller
- * is on direct PLB interface.
- */
- if (!request_mem_region(physaddr, 8, DRIVER_NAME)) {
- dev_err(dev, "Couldn't lock memory region at 0x%08lX\n",
- physaddr);
- rc = -ENODEV;
- goto err_region;
- }
+ if (drvdata->flags & BUS_ACCESS_FLAG) {
+ struct resource *res;
- drvdata->regs_phys = physaddr;
- drvdata->regs = ioremap(physaddr, 8);
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ drvdata->regs_phys = res->start;
+ drvdata->regs = devm_request_and_ioremap(&pdev->dev, res);
if (!drvdata->regs) {
- dev_err(dev, "Couldn't lock memory region at 0x%08lX\n",
- physaddr);
- rc = -ENODEV;
- goto err_map;
+ rc = -EADDRNOTAVAIL;
+ goto err_region;
}
}
if (!drvdata->fb_virt) {
dev_err(dev, "Could not allocate frame buffer memory\n");
rc = -ENOMEM;
- if (drvdata->flags & PLB_ACCESS_FLAG)
+ if (drvdata->flags & BUS_ACCESS_FLAG)
goto err_fbmem;
else
goto err_region;
memset_io((void __iomem *)drvdata->fb_virt, 0, fbsize);
/* Tell the hardware where the frame buffer is */
- xilinx_fb_out_be32(drvdata, REG_FB_ADDR, drvdata->fb_phys);
+ xilinx_fb_out32(drvdata, REG_FB_ADDR, drvdata->fb_phys);
+ rc = xilinx_fb_in32(drvdata, REG_FB_ADDR);
+ /* Endianess detection */
+ if (rc != drvdata->fb_phys) {
+ drvdata->flags |= LITTLE_ENDIAN_ACCESS;
+ xilinx_fb_out32(drvdata, REG_FB_ADDR, drvdata->fb_phys);
+ }
/* Turn on the display */
drvdata->reg_ctrl_default = REG_CTRL_ENABLE;
if (pdata->rotate_screen)
drvdata->reg_ctrl_default |= REG_CTRL_ROTATE;
- xilinx_fb_out_be32(drvdata, REG_CTRL,
+ xilinx_fb_out32(drvdata, REG_CTRL,
drvdata->reg_ctrl_default);
/* Fill struct fb_info */
goto err_regfb;
}
- if (drvdata->flags & PLB_ACCESS_FLAG) {
+ if (drvdata->flags & BUS_ACCESS_FLAG) {
/* Put a banner in the log (for DEBUG) */
- dev_dbg(dev, "regs: phys=%lx, virt=%p\n", physaddr,
+ dev_dbg(dev, "regs: phys=%x, virt=%p\n", drvdata->regs_phys,
drvdata->regs);
}
/* Put a banner in the log (for DEBUG) */
iounmap(drvdata->fb_virt);
/* Turn off the display */
- xilinx_fb_out_be32(drvdata, REG_CTRL, 0);
+ xilinx_fb_out32(drvdata, REG_CTRL, 0);
err_fbmem:
- if (drvdata->flags & PLB_ACCESS_FLAG)
- iounmap(drvdata->regs);
-
-err_map:
- if (drvdata->flags & PLB_ACCESS_FLAG)
- release_mem_region(physaddr, 8);
+ if (drvdata->flags & BUS_ACCESS_FLAG)
+ devm_iounmap(dev, drvdata->regs);
err_region:
kfree(drvdata);
iounmap(drvdata->fb_virt);
/* Turn off the display */
- xilinx_fb_out_be32(drvdata, REG_CTRL, 0);
+ xilinx_fb_out32(drvdata, REG_CTRL, 0);
/* Release the resources, as allocated based on interface */
- if (drvdata->flags & PLB_ACCESS_FLAG) {
- iounmap(drvdata->regs);
- release_mem_region(drvdata->regs_phys, 8);
- }
+ if (drvdata->flags & BUS_ACCESS_FLAG)
+ devm_iounmap(dev, drvdata->regs);
#ifdef CONFIG_PPC_DCR
else
dcr_unmap(drvdata->dcr_host, drvdata->dcr_len);
static int xilinxfb_of_probe(struct platform_device *op)
{
const u32 *prop;
- u32 *p;
- u32 tft_access;
+ u32 tft_access = 0;
struct xilinxfb_platform_data pdata;
- struct resource res;
- int size, rc;
+ int size;
struct xilinxfb_drvdata *drvdata;
/* Copy with the default pdata (not a ptr reference!) */
}
/*
- * To check whether the core is connected directly to DCR or PLB
+ * To check whether the core is connected directly to DCR or BUS
* interface and initialize the tft_access accordingly.
*/
- p = (u32 *)of_get_property(op->dev.of_node, "xlnx,dcr-splb-slave-if", NULL);
- tft_access = p ? *p : 0;
+ of_property_read_u32(op->dev.of_node, "xlnx,dcr-splb-slave-if",
+ &tft_access);
/*
- * Fill the resource structure if its direct PLB interface
+ * Fill the resource structure if its direct BUS interface
* otherwise fill the dcr_host structure.
*/
if (tft_access) {
- drvdata->flags |= PLB_ACCESS_FLAG;
- rc = of_address_to_resource(op->dev.of_node, 0, &res);
- if (rc) {
- dev_err(&op->dev, "invalid address\n");
- goto err;
- }
+ drvdata->flags |= BUS_ACCESS_FLAG;
}
#ifdef CONFIG_PPC_DCR
else {
int start;
- res.start = 0;
start = dcr_resource_start(op->dev.of_node, 0);
drvdata->dcr_len = dcr_resource_len(op->dev.of_node, 0);
drvdata->dcr_host = dcr_map(op->dev.of_node, start, drvdata->dcr_len);
if (!DCR_MAP_OK(drvdata->dcr_host)) {
dev_err(&op->dev, "invalid DCR address\n");
- goto err;
+ kfree(drvdata);
+ return -ENODEV;
}
}
#endif
pdata.rotate_screen = 1;
dev_set_drvdata(&op->dev, drvdata);
- return xilinxfb_assign(&op->dev, drvdata, res.start, &pdata);
-
- err:
- kfree(drvdata);
- return -ENODEV;
+ return xilinxfb_assign(op, drvdata, &pdata);
}
static int xilinxfb_of_remove(struct platform_device *op)
#define __LINUX_OF_DISPLAY_TIMING_H
struct device_node;
+struct display_timing;
struct display_timings;
#define OF_USE_NATIVE_MODE -1
projects / karo-tx-linux.git / commitdiff