]> git.karo-electronics.de Git - karo-tx-linux.git/commitdiff
ARM: EXYNOS: Add support for EXYNOS5410 SoC
authorTarek Dakhran <t.dakhran@samsung.com>
Wed, 11 Dec 2013 22:29:07 +0000 (07:29 +0900)
committerKukjin Kim <kgene.kim@samsung.com>
Wed, 11 Dec 2013 22:29:07 +0000 (07:29 +0900)
EXYNOS5410 is SoC in Samsung's Exynos5 SoC series.
Add initial support for this SoC.

Signed-off-by: Tarek Dakhran <t.dakhran@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Vyacheslav Tyrtov <v.tyrtov@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
arch/arm/mach-exynos/Kconfig
arch/arm/mach-exynos/common.c
arch/arm/mach-exynos/include/mach/map.h
arch/arm/mach-exynos/mach-exynos5-dt.c
arch/arm/mach-exynos/platsmp.c
arch/arm/plat-samsung/include/plat/cpu.h
arch/arm/plat-samsung/include/plat/map-s5p.h

index f9d67a0acb2af170737db3aa60a0b54f1f4091dd..1414bc6c42a58ca2c9dd0e83b259a18a35c773c6 100644 (file)
@@ -93,6 +93,16 @@ config SOC_EXYNOS5250
        help
          Enable EXYNOS5250 SoC support
 
+config SOC_EXYNOS5410
+       bool "SAMSUNG EXYNOS5410"
+       default y
+       depends on ARCH_EXYNOS5
+       select PM_GENERIC_DOMAINS if PM_RUNTIME
+       select S5P_PM if PM_SLEEP
+       select S5P_SLEEP if PM_SLEEP
+       help
+         Enable EXYNOS5410 SoC support
+
 config SOC_EXYNOS5420
        bool "SAMSUNG EXYNOS5420"
        default y
index 61d2906ccefb3660b3061bb1782576bd0a3ec78e..4768608d00d784ebf69c4094edde851bc5f72cf9 100644 (file)
@@ -52,6 +52,7 @@ static const char name_exynos4210[] = "EXYNOS4210";
 static const char name_exynos4212[] = "EXYNOS4212";
 static const char name_exynos4412[] = "EXYNOS4412";
 static const char name_exynos5250[] = "EXYNOS5250";
+static const char name_exynos5410[] = "EXYNOS5410";
 static const char name_exynos5420[] = "EXYNOS5420";
 static const char name_exynos5440[] = "EXYNOS5440";
 
@@ -84,6 +85,12 @@ static struct cpu_table cpu_ids[] __initdata = {
                .map_io         = exynos5_map_io,
                .init           = exynos_init,
                .name           = name_exynos5250,
+       }, {
+               .idcode         = EXYNOS5410_SOC_ID,
+               .idmask         = EXYNOS5_SOC_MASK,
+               .map_io         = exynos5_map_io,
+               .init           = exynos_init,
+               .name           = name_exynos5410,
        }, {
                .idcode         = EXYNOS5420_SOC_ID,
                .idmask         = EXYNOS5_SOC_MASK,
@@ -215,6 +222,15 @@ static struct map_desc exynos4x12_iodesc[] __initdata = {
        },
 };
 
+static struct map_desc exynos5410_iodesc[] __initdata = {
+       {
+               .virtual        = (unsigned long)S5P_VA_SYSRAM_NS,
+               .pfn            = __phys_to_pfn(EXYNOS5410_PA_SYSRAM_NS),
+               .length         = SZ_4K,
+               .type           = MT_DEVICE,
+       },
+};
+
 static struct map_desc exynos5250_iodesc[] __initdata = {
        {
                .virtual        = (unsigned long)S5P_VA_SYSRAM_NS,
@@ -374,6 +390,8 @@ static void __init exynos5_map_io(void)
 
        if (soc_is_exynos5250())
                iotable_init(exynos5250_iodesc, ARRAY_SIZE(exynos5250_iodesc));
+       if (soc_is_exynos5410())
+               iotable_init(exynos5410_iodesc, ARRAY_SIZE(exynos5410_iodesc));
 }
 
 struct bus_type exynos_subsys = {
index 7b046b59d9ecc8829a98699ed84a6ffcbad4a8f5..894f431366a94ea1126d39f25664a764b9c7f630 100644 (file)
@@ -29,6 +29,7 @@
 #define EXYNOS4210_PA_SYSRAM_NS                0x0203F000
 #define EXYNOS4x12_PA_SYSRAM_NS                0x0204F000
 #define EXYNOS5250_PA_SYSRAM_NS                0x0204F000
+#define EXYNOS5410_PA_SYSRAM_NS                0x02073000
 
 #define EXYNOS_PA_CHIPID               0x10000000
 
index 1fe075a70c1e83d34bf1440ac030fe86b551a4a6..7f78f66ae6fd6417bed1ce83d6b7bb918308815b 100644 (file)
@@ -50,6 +50,7 @@ static void __init exynos5_dt_machine_init(void)
 
 static char const *exynos5_dt_compat[] __initdata = {
        "samsung,exynos5250",
+       "samsung,exynos5410",
        "samsung,exynos5420",
        "samsung,exynos5440",
        NULL
index 58b43e6f926212277c38257ff50956c1aca16776..6506ce6c5c94a416008528307a663bad38240203 100644 (file)
@@ -40,6 +40,8 @@ static inline void __iomem *cpu_boot_reg_base(void)
 {
        if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_1_1)
                return S5P_INFORM5;
+       if (soc_is_exynos5410())
+               return EXYNOS5410_BOOT_REG;
        return S5P_VA_SYSRAM;
 }
 
index 335beb3413556637510b10ced41cc7f0a62f0b48..8f09488e7b3b846c921c4d0783511cce6609404a 100644 (file)
@@ -46,6 +46,7 @@ extern unsigned long samsung_cpu_id;
 #define EXYNOS4_CPU_MASK       0xFFFE0000
 
 #define EXYNOS5250_SOC_ID      0x43520000
+#define EXYNOS5410_SOC_ID      0xE5410000
 #define EXYNOS5420_SOC_ID      0xE5420000
 #define EXYNOS5440_SOC_ID      0xE5440000
 #define EXYNOS5_SOC_MASK       0xFFFFF000
@@ -68,6 +69,7 @@ IS_SAMSUNG_CPU(exynos4210, EXYNOS4210_CPU_ID, EXYNOS4_CPU_MASK)
 IS_SAMSUNG_CPU(exynos4212, EXYNOS4212_CPU_ID, EXYNOS4_CPU_MASK)
 IS_SAMSUNG_CPU(exynos4412, EXYNOS4412_CPU_ID, EXYNOS4_CPU_MASK)
 IS_SAMSUNG_CPU(exynos5250, EXYNOS5250_SOC_ID, EXYNOS5_SOC_MASK)
+IS_SAMSUNG_CPU(exynos5410, EXYNOS5410_SOC_ID, EXYNOS5_SOC_MASK)
 IS_SAMSUNG_CPU(exynos5420, EXYNOS5420_SOC_ID, EXYNOS5_SOC_MASK)
 IS_SAMSUNG_CPU(exynos5440, EXYNOS5440_SOC_ID, EXYNOS5_SOC_MASK)
 
@@ -148,6 +150,12 @@ IS_SAMSUNG_CPU(exynos5440, EXYNOS5440_SOC_ID, EXYNOS5_SOC_MASK)
 # define soc_is_exynos5250()   0
 #endif
 
+#if defined(CONFIG_SOC_EXYNOS5410)
+# define soc_is_exynos5410()   is_samsung_exynos5410()
+#else
+# define soc_is_exynos5410()   0
+#endif
+
 #if defined(CONFIG_SOC_EXYNOS5420)
 # define soc_is_exynos5420()   is_samsung_exynos5420()
 #else
index c18678610bc0ad952eba51726ef9f3d198caf44c..31cac9783824f2d285663b7b670c89c87b341aa3 100644 (file)
@@ -57,6 +57,9 @@
 #define S3C_UART_OFFSET                (0x400)
 #endif
 
+#define S5P_VA_SYSRAM_NS_X(x)  (S5P_VA_SYSRAM_NS + (x))
+#define EXYNOS5410_BOOT_REG    S5P_VA_SYSRAM_NS_X(0x1c)
+
 #include <plat/map-s3c.h>
 
 #endif /* __ASM_PLAT_MAP_S5P_H */