ARM: dts: imx6: Add imx-weim parameters to dtsi's

imx-weim should always set address-cells to 2,
and size_cells to 1.
On imx6, fsl,weim-cs-gpr will always be &gpr

Set these common parameters in the dtsi file,
rather than in a downstream dts.

Signed-off-by: Joshua Clayton <stillcompiling@gmail.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm/boot/dts/imx6q-evi.dts b/arch/arm/boot/dts/imx6q-evi.dts
index 6de21ff47c3a74e2325a7bfe7543b369d6bdce8f..7c7c1a855ece095e780ba55a9705615599a72cdf 100644 (file)
--- a/arch/arm/boot/dts/imx6q-evi.dts
+++ b/arch/arm/boot/dts/imx6q-evi.dts
@@ -232,10 +232,7 @@
 };
 
 &weim {
-       #address-cells = <2>;
-       #size-cells = <1>;
        ranges = <0 0 0x08000000 0x08000000>;
-       fsl,weim-cs-gpr = <&gpr>;
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_weimfpga &pinctrl_weimcs>;
        status = "okay";

diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
index 80064678ba3c5dbd015cafcfe098eb3dcdedc71a..52390ba83e81687aa2c2d3b73ed1271f530b6324 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
@@ -613,8 +613,6 @@
 &weim {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_weim_nor &pinctrl_weim_cs0>;
-       #address-cells = <2>;
-       #size-cells = <1>;
        ranges = <0 0 0x08000000 0x08000000>;
        status = "disabled"; /* pin conflict with SPI NOR */
 

diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index 1bbd36f4042405573d18270361191c349d6052b1..d7bed1f8ff1d6fc803f0d13651120b90742e1459 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -1092,10 +1092,13 @@
                        };
 
                        weim: weim@021b8000 {
+                               #address-cells = <2>;
+                               #size-cells = <1>;
                                compatible = "fsl,imx6q-weim";
                                reg = <0x021b8000 0x4000>;
                                interrupts = <0 14 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&clks IMX6QDL_CLK_EIM_SLOW>;
+                               fsl,weim-cs-gpr = <&gpr>;
                        };
 
                        ocotp: ocotp@021bc000 {

diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
index 02378db3f5fce2154e55d7af2b2bd3e60e3a95aa..c2b28c06e50d2abb3a321849b475077650fcf482 100644 (file)
--- a/arch/arm/boot/dts/imx6sl.dtsi
+++ b/arch/arm/boot/dts/imx6sl.dtsi
@@ -893,8 +893,11 @@
                        };
 
                        weim: weim@021b8000 {
+                               #address-cells = <2>;
+                               #size-cells = <1>;
                                reg = <0x021b8000 0x4000>;
                                interrupts = <0 14 IRQ_TYPE_LEVEL_HIGH>;
+                               fsl,weim-cs-gpr = <&gpr>;
                        };
 
                        ocotp: ocotp@021bc000 {

diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
index bd9fe674560186c5e0e7c636a30ce1b94993396b..dbc540f5fec512c957ed3812521b22ae5cc353bc 100644 (file)
--- a/arch/arm/boot/dts/imx6sx.dtsi
+++ b/arch/arm/boot/dts/imx6sx.dtsi
@@ -968,10 +968,13 @@
                        };
 
                        weim: weim@021b8000 {
+                               #address-cells = <2>;
+                               #size-cells = <1>;
                                compatible = "fsl,imx6sx-weim", "fsl,imx6q-weim";
                                reg = <0x021b8000 0x4000>;
                                interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&clks IMX6SX_CLK_EIM_SLOW>;
+                               fsl,weim-cs-gpr = <&gpr>;
                        };
 
                        ocotp: ocotp@021bc000 {