]> git.karo-electronics.de Git - karo-tx-uboot.git/commitdiff
Merge branch 'master' of git://www.denx.de/git/u-boot-microblaze
authorTom Rini <trini@konsulko.com>
Mon, 6 Jun 2016 11:16:39 +0000 (07:16 -0400)
committerTom Rini <trini@konsulko.com>
Mon, 6 Jun 2016 11:16:39 +0000 (07:16 -0400)
26 files changed:
arch/arm/cpu/armv8/zynqmp/cpu.c
arch/arm/dts/Makefile
arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts [new file with mode: 0644]
arch/microblaze/include/asm/asm.h
board/xilinx/microblaze-generic/Kconfig
board/xilinx/microblaze-generic/config.mk
board/xilinx/microblaze-generic/xparameters.h
board/xilinx/zynqmp/zynqmp.c
common/env_common.c
configs/microblaze-generic_defconfig
configs/xilinx_zynqmp_ep_defconfig
configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig
configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig
configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig [new file with mode: 0644]
configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig
configs/xilinx_zynqmp_zcu102_defconfig
configs/xilinx_zynqmp_zcu102_revB_defconfig
include/asm-generic/global_data.h
include/configs/xilinx_zynqmp.h
include/configs/xilinx_zynqmp_ep.h
include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h
include/configs/xilinx_zynqmp_zc1751_xm016_dc2.h
include/configs/xilinx_zynqmp_zc1751_xm018_dc4.h [new file with mode: 0644]
include/configs/xilinx_zynqmp_zc1751_xm019_dc5.h
include/configs/xilinx_zynqmp_zcu102.h
scripts/Makefile.spl

index 5dd3cd86cf52b24916360aba80ebae2539d0e508..509f0aa387a645a42d68e70cebaf931548a52f5d 100644 (file)
@@ -63,6 +63,11 @@ static struct mm_region zynqmp_mem_map[] = {
 };
 struct mm_region *mem_map = zynqmp_mem_map;
 
+u64 get_page_table_size(void)
+{
+       return 0x14000;
+}
+
 static unsigned int zynqmp_get_silicon_version_secure(void)
 {
        u32 ver;
index 95676806fa4802fecd4eb394fea526a86114098e..1814797b1c3418c06232e75186197f3acdc68ec3 100644 (file)
@@ -91,6 +91,7 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += \
        zynqmp-zcu102-revB.dtb                  \
        zynqmp-zc1751-xm015-dc1.dtb             \
        zynqmp-zc1751-xm016-dc2.dtb             \
+       zynqmp-zc1751-xm018-dc4.dtb             \
        zynqmp-zc1751-xm019-dc5.dtb
 dtb-$(CONFIG_AM33XX) += am335x-boneblack.dtb am335x-bone.dtb am335x-evm.dtb \
        am335x-evmsk.dtb \
diff --git a/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts b/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts
new file mode 100644 (file)
index 0000000..03f1ad7
--- /dev/null
@@ -0,0 +1,212 @@
+/*
+ * dts file for Xilinx ZynqMP zc1751-xm018-dc4
+ *
+ * (C) Copyright 2015 - 2016, Xilinx, Inc.
+ *
+ * Michal Simek <michal.simek@xilinx.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+/dts-v1/;
+
+#include "zynqmp.dtsi"
+#include "zynqmp-clk.dtsi"
+
+/ {
+       model = "ZynqMP zc1751-xm018-dc4";
+       compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp";
+
+       aliases {
+               can0 = &can0;
+               can1 = &can1;
+               ethernet0 = &gem0;
+               ethernet1 = &gem1;
+               ethernet2 = &gem2;
+               ethernet3 = &gem3;
+               gpio0 = &gpio;
+               i2c0 = &i2c0;
+               i2c1 = &i2c1;
+               rtc0 = &rtc;
+               serial0 = &uart0;
+               serial1 = &uart1;
+               spi0 = &qspi;
+       };
+
+       chosen {
+               bootargs = "earlycon";
+               stdout-path = "serial0:115200n8";
+       };
+
+       memory {
+               device_type = "memory";
+               reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>;
+       };
+};
+
+&can0 {
+       status = "okay";
+};
+
+&can1 {
+       status = "okay";
+};
+
+/* fpd_dma clk 667MHz, lpd_dma 500MHz */
+&fpd_dma_chan1 {
+       status = "okay";
+       xlnx,include-sg; /* for testing purpose */
+       xlnx,overfetch; /* for testing purpose */
+       xlnx,ratectrl = <0>; /* for testing purpose */
+       xlnx,src-issue = <31>;
+};
+
+&fpd_dma_chan2 {
+       status = "okay";
+       xlnx,ratectrl = <100>; /* for testing purpose */
+       xlnx,src-issue = <4>; /* for testing purpose */
+};
+
+&fpd_dma_chan3 {
+       status = "okay";
+};
+
+&fpd_dma_chan4 {
+       status = "okay";
+       xlnx,include-sg; /* for testing purpose */
+};
+
+&fpd_dma_chan5 {
+       status = "okay";
+};
+
+&fpd_dma_chan6 {
+       status = "okay";
+       xlnx,include-sg; /* for testing purpose */
+};
+
+&fpd_dma_chan7 {
+       status = "okay";
+};
+
+&fpd_dma_chan8 {
+       status = "okay";
+       xlnx,include-sg; /* for testing purpose */
+};
+
+&lpd_dma_chan1 {
+       status = "okay";
+};
+
+&lpd_dma_chan2 {
+       status = "okay";
+};
+
+&lpd_dma_chan3 {
+       status = "okay";
+};
+
+&lpd_dma_chan4 {
+       status = "okay";
+};
+
+&lpd_dma_chan5 {
+       status = "okay";
+};
+
+&lpd_dma_chan6 {
+       status = "okay";
+};
+
+&lpd_dma_chan7 {
+       status = "okay";
+};
+
+&lpd_dma_chan8 {
+       status = "okay";
+};
+
+&xlnx_dp {
+       status = "okay";
+};
+
+&xlnx_dpdma {
+       status = "okay";
+};
+
+&gem0 {
+       status = "okay";
+       local-mac-address = [00 0a 35 00 02 90];
+       phy-mode = "rgmii-id";
+       phy-handle = <&ethernet_phy0>;
+       ethernet_phy0: ethernet-phy@0 { /* Marvell 88e1512 */
+               reg = <0>;
+       };
+       ethernet_phy7: ethernet-phy@7 { /* Vitesse VSC8211 */
+               reg = <7>;
+       };
+       ethernet_phy3: ethernet-phy@3 { /* Realtek RTL8211DN */
+               reg = <3>;
+       };
+       ethernet_phy8: ethernet-phy@8 { /* Vitesse VSC8211 */
+               reg = <8>;
+       };
+};
+
+&gem1 {
+       status = "okay";
+       local-mac-address = [00 0a 35 00 02 91];
+       phy-mode = "rgmii-id";
+       phy-handle = <&ethernet_phy7>;
+};
+
+&gem2 {
+       status = "okay";
+       local-mac-address = [00 0a 35 00 02 92];
+       phy-mode = "rgmii-id";
+       phy-handle = <&ethernet_phy3>;
+};
+
+&gem3 {
+       status = "okay";
+       local-mac-address = [00 0a 35 00 02 93];
+       phy-mode = "rgmii-id";
+       phy-handle = <&ethernet_phy8>;
+};
+
+&gpio {
+       status = "okay";
+};
+
+&gpu {
+       status = "okay";
+};
+
+&i2c0 {
+       clock-frequency = <400000>;
+       status = "okay";
+};
+
+&i2c1 {
+       clock-frequency = <400000>;
+       status = "okay";
+};
+
+&rtc {
+       status = "okay";
+};
+
+&uart0 {
+       status = "okay";
+};
+
+&uart1 {
+       status = "okay";
+};
+
+&watchdog0 {
+       status = "okay";
+};
index 11f3dd0f0ec026acba812efffc8351114bf2a334..94f056275914ca5128fc4d2eabdc28737e1b4484 100644 (file)
@@ -50,7 +50,7 @@
 #define NOP    __asm__ __volatile__ ("nop");
 
 /* use machine status registe USE_MSR_REG */
-#if XILINX_USE_MSR_INSTR == 1
+#if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR == 1
 #define MSRSET(val) \
        __asm__ __volatile__ ("msrset r0," #val );
 
index 461d7dce2c2ee5ad0846e89b4032593ff5f1abc3..02ac65c1d3d514a9c9c46521b03d648c8288aa8d 100644 (file)
@@ -9,4 +9,28 @@ config SYS_VENDOR
 config SYS_CONFIG_NAME
        default "microblaze-generic"
 
+config XILINX_MICROBLAZE0_USE_MSR_INSTR
+       int "USE_MSR_INSTR range (0:1)"
+       default 0
+
+config XILINX_MICROBLAZE0_USE_PCMP_INSTR
+       int "USE_PCMP_INSTR range (0:1)"
+       default 0
+
+config XILINX_MICROBLAZE0_USE_BARREL
+       int "USE_BARREL range (0:1)"
+       default 0
+
+config XILINX_MICROBLAZE0_USE_DIV
+       int "USE_DIV range (0:1)"
+       default 0
+
+config XILINX_MICROBLAZE0_USE_HW_MUL
+       int "USE_HW_MUL values (0=NONE, 1=MUL32, 2=MUL64)"
+       default 0
+
+config XILINX_MICROBLAZE0_HW_VER
+       string "Core version number"
+       default 7.10.d
+
 endif
index 95ef9c0f069060569d57c78d8632a7aa075dbf31..1dee2d6e3a5df056598103457490b831e217133d 100644 (file)
@@ -1,16 +1,20 @@
 #
-# (C) Copyright 2007 Michal Simek
+# (C) Copyright 2007 - 2016 Michal Simek
 #
-# Michal  SIMEK <monstr@monstr.eu>
+# Michal SIMEK <monstr@monstr.eu>
 #
 # SPDX-License-Identifier:     GPL-2.0+
 #
-# CAUTION: This file is a faked configuration !!!
-#          There is no real target for the microblaze-generic
-#          configuration. You have to replace this file with
-#          the generated file from your Xilinx design flow.
-#
 
-PLATFORM_CPPFLAGS += -mno-xl-soft-mul
-PLATFORM_CPPFLAGS += -mno-xl-soft-div
-PLATFORM_CPPFLAGS += -mxl-barrel-shift
+CPU_VER := $(shell echo $(CONFIG_XILINX_MICROBLAZE0_HW_VER))
+
+# USE_HW_MUL can be 0, 1, or 2, defining a hierarchy of HW Mul support.
+CPUFLAGS-$(subst 1,,$(CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL)) += -mxl-multiply-high
+CPUFLAGS-$(CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL) += -mno-xl-soft-mul
+CPUFLAGS-$(CONFIG_XILINX_MICROBLAZE0_USE_DIV) += -mno-xl-soft-div
+CPUFLAGS-$(CONFIG_XILINX_MICROBLAZE0_USE_BARREL) += -mxl-barrel-shift
+CPUFLAGS-$(CONFIG_XILINX_MICROBLAZE0_USE_PCMP_INSTR) += -mxl-pattern-compare
+
+CPUFLAGS-1 += $(call cc-option,-mcpu=v$(CPU_VER))
+
+PLATFORM_CPPFLAGS += $(CPUFLAGS-1) $(CPUFLAGS-2)
index dc5645bd1461d3181464bfbd981fd18e2c14430d..ee7d0875d22117222fe0068132b786ef2c051745 100644 (file)
@@ -14,7 +14,6 @@
 #define XILINX_BOARD_NAME      microblaze-generic
 
 /* Microblaze is microblaze_0 */
-#define XILINX_USE_MSR_INSTR   1
 #define XILINX_FSL_NUMBER      3
 
 /* GPIO is LEDs_4Bit*/
index 4623cd49e9c797f309540fb618e5076a2bee82a8..f15dc5d71522231ed478bf3639747781bf9f59cb 100644 (file)
@@ -9,6 +9,7 @@
 #include <sata.h>
 #include <ahci.h>
 #include <scsi.h>
+#include <malloc.h>
 #include <asm/arch/clk.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/sys_proto.h>
@@ -214,6 +215,13 @@ int board_late_init(void)
 {
        u32 reg = 0;
        u8 bootmode;
+       const char *mode;
+       char *new_targets;
+
+       if (!(gd->flags & GD_FLG_ENV_DEFAULT)) {
+               debug("Saved variables - Skipping\n");
+               return 0;
+       }
 
        reg = readl(&crlapb_base->boot_mode);
        bootmode = reg & BOOT_MODES_MASK;
@@ -222,37 +230,49 @@ int board_late_init(void)
        switch (bootmode) {
        case JTAG_MODE:
                puts("JTAG_MODE\n");
-               setenv("modeboot", "jtagboot");
+               mode = "pxe dhcp";
                break;
        case QSPI_MODE_24BIT:
        case QSPI_MODE_32BIT:
-               setenv("modeboot", "qspiboot");
+               mode = "qspi0";
                puts("QSPI_MODE\n");
                break;
        case EMMC_MODE:
                puts("EMMC_MODE\n");
-               setenv("modeboot", "sdboot");
+               mode = "mmc0";
                break;
        case SD_MODE:
                puts("SD_MODE\n");
-               setenv("modeboot", "sdboot");
+               mode = "mmc0";
                break;
        case SD_MODE1:
                puts("SD_MODE1\n");
 #if defined(CONFIG_ZYNQ_SDHCI0) && defined(CONFIG_ZYNQ_SDHCI1)
-               setenv("sdbootdev", "1");
+               mode = "mmc1";
+#else
+               mode = "mmc0";
 #endif
-               setenv("modeboot", "sdboot");
                break;
        case NAND_MODE:
                puts("NAND_MODE\n");
-               setenv("modeboot", "nandboot");
+               mode = "nand0";
                break;
        default:
+               mode = "";
                printf("Invalid Boot Mode:0x%x\n", bootmode);
                break;
        }
 
+       /*
+        * One terminating char + one byte for space between mode
+        * and default boot_targets
+        */
+       new_targets = calloc(1, strlen(mode) +
+                               strlen(getenv("boot_targets")) + 2);
+
+       sprintf(new_targets, "%s %s", mode, getenv("boot_targets"));
+       setenv("boot_targets", new_targets);
+
        return 0;
 }
 
index af59c72e1fd7d502f4899d99e8a1458cc7354d13..13db7dc3f7553fc909618462a376b829e1a194c6 100644 (file)
@@ -123,6 +123,7 @@ void set_default_env(const char *s)
                error("Environment import failed: errno = %d\n", errno);
 
        gd->flags |= GD_FLG_ENV_READY;
+       gd->flags |= GD_FLG_ENV_DEFAULT;
 }
 
 
index 8c7e4b79387d39031a64eac6c63acec28c2430b3..2ef713fee3e93b662533b3852f03ced01fab0916 100644 (file)
@@ -2,6 +2,10 @@ CONFIG_MICROBLAZE=y
 CONFIG_SPL_SYS_MALLOC_SIMPLE=y
 CONFIG_SPL_DM=y
 CONFIG_TARGET_MICROBLAZE_GENERIC=y
+CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR=1
+CONFIG_XILINX_MICROBLAZE0_USE_BARREL=1
+CONFIG_XILINX_MICROBLAZE0_USE_DIV=1
+CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL=1
 CONFIG_SYS_TEXT_BASE=0x29000000
 CONFIG_DEFAULT_DEVICE_TREE="microblaze-generic"
 CONFIG_SPL=y
index f342ed293c774a68135ba334dd9ce9a5228815cc..d3f093be540e3bcc066b839ed05c4c84cbe4bd2f 100644 (file)
@@ -1,7 +1,7 @@
 CONFIG_ARM=y
 CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_ep"
 CONFIG_ARCH_ZYNQMP=y
-CONFIG_SYS_MALLOC_F_LEN=0x4000
+CONFIG_SYS_MALLOC_F_LEN=0x8000
 CONFIG_DM_I2C=y
 CONFIG_DM_GPIO=y
 CONFIG_ZYNQMP_USB=y
@@ -9,6 +9,7 @@ CONFIG_SYS_TEXT_BASE=0x8000000
 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-ep108"
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="ZynqMP> "
 # CONFIG_CMD_CONSOLE is not set
@@ -19,6 +20,7 @@ CONFIG_SYS_PROMPT="ZynqMP> "
 # CONFIG_CMD_LOADB is not set
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_DFU=y
index 5d641a57bd508a225517a99bb82cd75a0528c1cd..e160f8fcb77695901ae67c3a5305f69874183220 100644 (file)
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zc1751_xm015_dc1"
 CONFIG_ARCH_ZYNQMP=y
+CONFIG_SYS_MALLOC_F_LEN=0x8000
 CONFIG_DM_I2C=y
 CONFIG_DM_GPIO=y
 CONFIG_ZYNQMP_USB=y
@@ -8,6 +9,7 @@ CONFIG_SYS_TEXT_BASE=0x8000000
 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm015-dc1"
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="ZynqMP> "
 # CONFIG_CMD_IMLS is not set
index 77e6180143f5f918fe4089b14f2f2b7f10d16d94..ffbedfa2ef7f3b86c1ed48b0ecece04f872e66db 100644 (file)
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zc1751_xm016_dc2"
 CONFIG_ARCH_ZYNQMP=y
+CONFIG_SYS_MALLOC_F_LEN=0x8000
 CONFIG_DM_I2C=y
 CONFIG_DM_GPIO=y
 CONFIG_ZYNQMP_USB=y
@@ -8,11 +9,13 @@ CONFIG_SYS_TEXT_BASE=0x8000000
 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm016-dc2"
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="ZynqMP> "
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_MEMTEST=y
 # CONFIG_CMD_FLASH is not set
+CONFIG_CMD_NAND=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_DFU=y
@@ -40,6 +43,11 @@ CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_DM_ETH=y
 CONFIG_ZYNQ_GEM=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_ZYNQ=y
+CONFIG_DEBUG_UART_BASE=0xff000000
+CONFIG_DEBUG_UART_CLOCK=100000000
+CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_USB=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
diff --git a/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig b/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig
new file mode 100644 (file)
index 0000000..6570348
--- /dev/null
@@ -0,0 +1,43 @@
+CONFIG_ARM=y
+CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zc1751_xm018_dc4"
+CONFIG_ARCH_ZYNQMP=y
+CONFIG_SYS_MALLOC_F_LEN=0x8000
+CONFIG_DM_I2C=y
+CONFIG_DM_GPIO=y
+CONFIG_SYS_TEXT_BASE=0x8000000
+CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm018-dc4"
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="ZynqMP> "
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_MEMTEST=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_TIMER=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_OF_EMBED=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_SYS_I2C_CADENCE=y
+CONFIG_DM_MMC=y
+CONFIG_ZYNQ_SDHCI=y
+CONFIG_DM_ETH=y
+CONFIG_ZYNQ_GEM=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_ZYNQ=y
+CONFIG_DEBUG_UART_BASE=0xff000000
+CONFIG_DEBUG_UART_CLOCK=100000000
+CONFIG_DEBUG_UART_ANNOUNCE=y
index f7c671b859e32ea5164735bf5e171a65fa50f8cb..e1fc8b0ee27172d43e39810c52cc04530760c01a 100644 (file)
@@ -1,12 +1,14 @@
 CONFIG_ARM=y
 CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zc1751_xm019_dc5"
 CONFIG_ARCH_ZYNQMP=y
+CONFIG_SYS_MALLOC_F_LEN=0x8000
 CONFIG_DM_I2C=y
 CONFIG_DM_GPIO=y
 CONFIG_SYS_TEXT_BASE=0x8000000
 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm019-dc5"
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="ZynqMP> "
 # CONFIG_CMD_IMLS is not set
index b370bc1835acda7d7b3f6b96fb25ed054496724e..7cd544111425bb5a367d4b7fcdce57f353064b3c 100644 (file)
@@ -1,12 +1,14 @@
 CONFIG_ARM=y
 CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zcu102"
 CONFIG_ARCH_ZYNQMP=y
+CONFIG_SYS_MALLOC_F_LEN=0x8000
 CONFIG_DM_GPIO=y
 CONFIG_ZYNQMP_USB=y
 CONFIG_SYS_TEXT_BASE=0x8000000
 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu102"
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="ZynqMP> "
 # CONFIG_CMD_IMLS is not set
index 97644528898078ed15d0021ea5332c15c7ce22a1..20db671cad89e89e97637d7bca23eefd173ac52c 100644 (file)
@@ -1,12 +1,14 @@
 CONFIG_ARM=y
 CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zcu102"
 CONFIG_ARCH_ZYNQMP=y
+CONFIG_SYS_MALLOC_F_LEN=0x8000
 CONFIG_DM_GPIO=y
 CONFIG_ZYNQMP_USB=y
 CONFIG_SYS_TEXT_BASE=0x8000000
 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu102-revB"
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="ZynqMP> "
 # CONFIG_CMD_IMLS is not set
index f2810a1bd75f579a0f8daddfc8918264ef467223..0abcbe4c0b3a533301fd1e5eda7e3b7dfe3309be 100644 (file)
@@ -141,5 +141,6 @@ typedef struct global_data {
 #define GD_FLG_SPL_INIT                0x00400 /* spl_init() has been called      */
 #define GD_FLG_SKIP_RELOC      0x00800 /* Don't relocate */
 #define GD_FLG_RECORD          0x01000 /* Record console */
+#define GD_FLG_ENV_DEFAULT     0x02000 /* Default variable flag */
 
 #endif /* __ASM_GENERIC_GBL_DATA_H */
index ffb6b34d57cec9b9673f8b9f6bd7bf8ab33b3e81..fc2e1f72d0cece2cd36e1aa3cf594f6e92706bed 100644 (file)
@@ -76,7 +76,6 @@
 #define CONFIG_BOOTP_GATEWAY
 #define CONFIG_BOOTP_HOSTNAME
 #define CONFIG_BOOTP_MAY_FAIL
-#define CONFIG_BOOTP_SERVERIP
 #define CONFIG_BOOTP_DNS
 #define CONFIG_BOOTP_PXE
 #define CONFIG_BOOTP_SUBNETMASK
 #endif
 
 #ifdef CONFIG_NAND_ARASAN
-# define CONFIG_CMD_NAND
 # define CONFIG_CMD_NAND_LOCK_UNLOCK
 # define CONFIG_SYS_MAX_NAND_DEVICE    1
 # define CONFIG_SYS_NAND_SELF_INIT
 # define DFU_ALT_INFO
 #endif
 
-/* Initial environment variables */
-#ifndef CONFIG_EXTRA_ENV_SETTINGS
-#define CONFIG_EXTRA_ENV_SETTINGS \
-       "kernel_addr=0x80000\0" \
-       "fdt_addr=0x7000000\0" \
-       "fdt_high=0x10000000\0" \
-       CONFIG_KERNEL_FDT_OFST_SIZE \
-       "sdbootdev=0\0"\
-       "sdboot=mmc dev $sdbootdev && mmcinfo && load mmc $sdbootdev:$partid $fdt_addr system.dtb && " \
-               "load mmc $sdbootdev:$partid $kernel_addr Image && " \
-               "booti $kernel_addr - $fdt_addr\0" \
-       DFU_ALT_INFO
-#endif
-
-#define CONFIG_BOOTCOMMAND     "run $modeboot"
 #define CONFIG_BOOTDELAY       3
 
 #define CONFIG_BOARD_LATE_INIT
 # define CONFIG_PHY_NATSEMI
 # define CONFIG_PHY_TI
 # define CONFIG_PHY_GIGE
+# define CONFIG_PHY_VITESSE
+# define CONFIG_PHY_REALTEK
 # define PHY_ANEG_TIMEOUT       20000
 #endif
 
 # define CONFIG_SYS_EEPROM_SIZE                        (64 * 1024)
 #endif
 
-#ifdef CONFIG_AHCI
+#ifdef CONFIG_SATA_CEVA
+#define CONFIG_AHCI
 #define CONFIG_LIBATA
 #define CONFIG_SCSI_AHCI
 #define CONFIG_SCSI_AHCI_PLAT
 #define CONFIG_BOARD_EARLY_INIT_R
 #define CONFIG_CLOCKS
 
+#define ENV_MEM_LAYOUT_SETTINGS \
+       "fdt_high=10000000\0" \
+       "initrd_high=10000000\0" \
+       "fdt_addr_r=0x40000000\0" \
+       "pxefile_addr_r=0x10000000\0" \
+       "kernel_addr_r=0x18000000\0" \
+       "scriptaddr=0x02000000\0" \
+       "ramdisk_addr_r=0x02100000\0" \
+
+#if defined(CONFIG_ZYNQ_SDHCI)
+# define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0) func(MMC, mmc, 1)
+#else
+# define BOOT_TARGET_DEVICES_MMC(func)
+#endif
+
+#if defined(CONFIG_SATA_CEVA)
+# define BOOT_TARGET_DEVICES_SCSI(func)        func(SCSI, scsi, 0)
+#else
+# define BOOT_TARGET_DEVICES_SCSI(func)
+#endif
+
+#if defined(CONFIG_ZYNQMP_USB)
+# define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0) func(USB, usb, 1)
+#else
+# define BOOT_TARGET_DEVICES_USB(func)
+#endif
+
+#define BOOT_TARGET_DEVICES(func) \
+       BOOT_TARGET_DEVICES_MMC(func) \
+       BOOT_TARGET_DEVICES_USB(func) \
+       BOOT_TARGET_DEVICES_SCSI(func) \
+       func(PXE, pxe, na) \
+       func(DHCP, dhcp, na)
+
+#include <config_distro_bootcmd.h>
+
+/* Initial environment variables */
+#ifndef CONFIG_EXTRA_ENV_SETTINGS
+#define CONFIG_EXTRA_ENV_SETTINGS \
+       ENV_MEM_LAYOUT_SETTINGS \
+       BOOTENV \
+       DFU_ALT_INFO
+#endif
+
 #define CONFIG_SPL_TEXT_BASE           0xfffc0000
 #define CONFIG_SPL_MAX_SIZE            0x20000
 
index 95063557137bc9e77a026e4ec79351cb5c6fe263..c5bd5da43c5e198697b658d1cb6bf6206d4b9342 100644 (file)
 
 #define COUNTER_FREQUENCY      4000000
 
-#define CONFIG_KERNEL_FDT_OFST_SIZE \
-       "kernel_offset=0x400000\0" \
-       "fdt_offset=0x2400000\0" \
-       "kernel_size=0x2000000\0" \
-       "fdt_size=0x80000\0" \
-       "board=ep108\0"
-
 #include <configs/xilinx_zynqmp.h>
 
 #endif /* __CONFIG_ZYNQMP_EP_H */
index 3c0ba883dbba47f5dc8a1663ee0daf303944b033..c9f443207d905ad6c15bc4c2ada8d71371331405 100644 (file)
 
 #define CONFIG_IDENT_STRING    " Xilinx ZynqMP ZC1751 xm015 dc1"
 
-#define CONFIG_KERNEL_FDT_OFST_SIZE \
-       "kernel_offset=0x400000\0" \
-       "fdt_offset=0x2400000\0" \
-       "kernel_size=0x2000000\0" \
-       "fdt_size=0x80000\0" \
-       "board=zc1751-dc1\0"
-
 #include <configs/xilinx_zynqmp.h>
 
 #endif /* __CONFIG_ZYNQMP_ZC1751_XM015_DC1_H */
index 83ea624c51c4768f8e853243a1595b1842aa145f..526d0bbe5852419d51cfae9a8cc5413628fb5b0b 100644 (file)
 
 #define CONFIG_IDENT_STRING    " Xilinx ZynqMP ZC1751 xm016 dc2"
 
-#define CONFIG_KERNEL_FDT_OFST_SIZE \
-       "kernel_offset=0x400000\0" \
-       "fdt_offset=0x2400000\0" \
-       "kernel_size=0x2000000\0" \
-       "fdt_size=0x80000\0" \
-       "board=zc1751-dc2\0"
-
 #include <configs/xilinx_zynqmp.h>
 
 #endif /* __CONFIG_ZYNQMP_ZC1751_XM016_DC2_H */
diff --git a/include/configs/xilinx_zynqmp_zc1751_xm018_dc4.h b/include/configs/xilinx_zynqmp_zc1751_xm018_dc4.h
new file mode 100644 (file)
index 0000000..65277a6
--- /dev/null
@@ -0,0 +1,17 @@
+/*
+ * Configuration for Xilinx ZynqMP zc1751 XM018 DC4
+ *
+ * (C) Copyright 2015 Xilinx, Inc.
+ * Michal Simek <michal.simek@xilinx.com>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#ifndef __CONFIG_ZYNQMP_ZC1751_XM018_DC4_H
+#define __CONFIG_ZYNQMP_ZC1751_XM018_DC4_H
+
+#define CONFIG_IDENT_STRING    " Xilinx ZynqMP ZC1751 xm018 dc4"
+
+#include <configs/xilinx_zynqmp.h>
+
+#endif /* __CONFIG_ZYNQMP_ZC1751_XM018_DC4_H */
index 4f8f5c10536dc8e815c840d006b631599e9cb417..76350d957950a86cd3ae48b5faff649f8b9f6be6 100644 (file)
 
 #define CONFIG_IDENT_STRING    " Xilinx ZynqMP ZC1751 xm019 dc5"
 
-#define CONFIG_KERNEL_FDT_OFST_SIZE \
-       "kernel_offset=0x400000\0" \
-       "fdt_offset=0x2400000\0" \
-       "kernel_size=0x2000000\0" \
-       "fdt_size=0x80000\0" \
-       "board=zc1751-dc5\0"
-
 #include <configs/xilinx_zynqmp.h>
 
 #endif /* __CONFIG_ZYNQMP_ZC1751_XM019_DC5_H */
index 81079fe7d8b239c91420c309e23713608c530374..7ceab3230b8842e923574c3daa3d75c42ea6dc17 100644 (file)
@@ -41,7 +41,6 @@
 #define CONFIG_CMD_PCA953X
 #define CONFIG_CMD_PCA953X_INFO
 
-#define CONFIG_AHCI
 #define CONFIG_SATA_CEVA
 
 #define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR}
 #define CONFIG_ZYNQ_GEM_EEPROM_ADDR    0x54
 #define CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET 0x20
 
-#define CONFIG_KERNEL_FDT_OFST_SIZE \
-       "kernel_offset=0x180000\0" \
-       "fdt_offset=0x100000\0" \
-       "kernel_size=0x1e00000\0" \
-       "fdt_size=0x80000\0" \
-       "board=zcu102\0"
-
 #include <configs/xilinx_zynqmp.h>
 
 #endif /* __CONFIG_ZYNQMP_ZCU102_H */
index 6d2017da7e975e88295629bf4dcfaa3450fa43a7..0997fd9fddfc862dec9164bc7ccc82cf96986b9c 100644 (file)
@@ -158,11 +158,8 @@ ifeq ($(CONFIG_SYS_SOC),"at91")
 ALL-y  += boot.bin
 endif
 
-ifdef CONFIG_ARCH_ZYNQ
-ALL-y  += $(obj)/boot.bin
-endif
-
-ALL-(CONFIG_ARCH_ZYNQMP)       += $(obj)/boot.bin
+ALL-$(CONFIG_ARCH_ZYNQ)                += $(obj)/boot.bin
+ALL-$(CONFIG_ARCH_ZYNQMP)      += $(obj)/boot.bin
 
 all:   $(ALL-y)