The constant DDR_WINDOW_CPU1_BASE has wrong value.
Because of that mv78xx0_mbus_dram_info is not filled properly on
start, and in its turn drivers, that used mv78xx0_mbus_dram_info,
in my case mv643xx_eth.c, not work on second core.
According to
MV76100, MV78100, and MV78200 DiscoveryTM Innovation Series
CPU Family Functional Specifications
address should be 0x1570.
Signed-off-by: Evgeniy Dushistov <dushistov@mail.ru>
Acked-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
*/
#define DDR_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x00000)
#define DDR_WINDOW_CPU0_BASE (DDR_VIRT_BASE | 0x1500)
-#define DDR_WINDOW_CPU1_BASE (DDR_VIRT_BASE | 0x1700)
+#define DDR_WINDOW_CPU1_BASE (DDR_VIRT_BASE | 0x1570)
#define DEV_BUS_PHYS_BASE (MV78XX0_REGS_PHYS_BASE | 0x10000)
#define DEV_BUS_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x10000)