]> git.karo-electronics.de Git - karo-tx-linux.git/commitdiff
ENGR00223349-3 gpmi: add a new field for HW_GPMI_CTRL1
authorHuang Shijie <b32955@freescale.com>
Fri, 7 Sep 2012 06:37:47 +0000 (14:37 +0800)
committerOliver Wendt <ow@karo-electronics.de>
Mon, 30 Sep 2013 12:12:59 +0000 (14:12 +0200)
add the WRN_DLY_SEL field for HW_GPMI_CTRL1.
This field is used as delay for gpmi write strobe.

Signed-off-by: Huang Shijie <b32955@freescale.com>
drivers/mtd/nand/gpmi-nand/gpmi-lib.c
drivers/mtd/nand/gpmi-nand/gpmi-nand.h

index a65b6791415f4a9485eba9ee8d0d9f2ecb03e978..c13ae42a137d104899c265cb1542c3a91742581f 100644 (file)
@@ -992,6 +992,7 @@ return_results:
        hw->use_half_periods        = dll_use_half_periods;
        hw->sample_delay_factor     = sample_delay_factor;
        hw->device_busy_timeout     = 0x500; /* default busy timeout value. */
+       hw->wrn_dly_sel             = 0;
 
        /* Return success. */
        return 0;
@@ -1037,6 +1038,9 @@ void gpmi_begin(struct gpmi_nand_data *this)
                gpmi_regs + HW_GPMI_TIMING1);
 
        /* [3] The following code is to set the HW_GPMI_CTRL1. */
+       writel(BM_GPMI_CTRL1_WRN_DLY_SEL, gpmi_regs + HW_GPMI_CTRL1_CLR);
+       writel(BF_GPMI_CTRL1_WRN_DLY_SEL(hw.wrn_dly_sel),
+                                       gpmi_regs + HW_GPMI_CTRL1_SET);
 
        /* DLL_ENABLE must be set to 0 when setting RDN_DELAY or HALF_PERIOD. */
        writel(BM_GPMI_CTRL1_DLL_ENABLE, gpmi_regs + HW_GPMI_CTRL1_CLR);
index cf50a6055511a6273189473542fe269e1a6b2b81..19b049f64d60a8916afd2f17f85b85a7d8489fd6 100644 (file)
@@ -194,6 +194,7 @@ struct gpmi_nand_data {
  * @use_half_periods:          Indicates the clock is running slowly, so the
  *                             NFC DLL should use half-periods.
  * @sample_delay_factor:       The sample delay factor.
+ * @wrn_dly_sel:               The delay on the GPMI write strobe.
  */
 struct gpmi_nfc_hardware_timing {
        /* for GPMI_HW_GPMI_TIMING0 */
@@ -207,6 +208,7 @@ struct gpmi_nfc_hardware_timing {
        /* for GPMI_HW_GPMI_CTRL1 */
        bool     use_half_periods;
        uint8_t  sample_delay_factor;
+       uint8_t  wrn_dly_sel;
 };
 
 /**