Platform: goldfish: goldfish_pipe.c: Add DMA support using managed version

Coherent mapping guarantees that the device and CPU are in sync.

Signed-off-by: Shraddha Barke <shraddha.6596@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/platform/goldfish/goldfish_pipe.c b/drivers/platform/goldfish/goldfish_pipe.c
index e7a29e2750c6aeb274047b37a9d32eb3fe70961d..9f6734ce1873c8143664d08a9342bd807fe1fd3a 100644 (file)
--- a/drivers/platform/goldfish/goldfish_pipe.c
+++ b/drivers/platform/goldfish/goldfish_pipe.c
@@ -57,6 +57,7 @@
 #include <linux/slab.h>
 #include <linux/io.h>
 #include <linux/goldfish.h>
+#include <linux/dma-mapping.h>
 
 /*
  * IMPORTANT: The following constants must match the ones used and defined
@@ -217,17 +218,16 @@ static int valid_batchbuffer_addr(struct goldfish_pipe_dev *dev,
 static int setup_access_params_addr(struct platform_device *pdev,
                                        struct goldfish_pipe_dev *dev)
 {
-       u64 paddr;
+       dma_addr_t dma_handle;
        struct access_params *aps;
 
-       aps = devm_kzalloc(&pdev->dev, sizeof(struct access_params), GFP_KERNEL);
+       aps = dmam_alloc_coherent(&pdev->dev, sizeof(struct access_params),
+                                 &dma_handle, GFP_KERNEL);
        if (!aps)
-               return -1;
+               return -ENOMEM;
 
-       /* FIXME */
-       paddr = __pa(aps);
-       writel((u32)(paddr >> 32), dev->base + PIPE_REG_PARAMS_ADDR_HIGH);
-       writel((u32)paddr, dev->base + PIPE_REG_PARAMS_ADDR_LOW);
+       writel(upper_32_bits(dma_handle), dev->base + PIPE_REG_PARAMS_ADDR_HIGH);
+       writel(lower_32_bits(dma_handle), dev->base + PIPE_REG_PARAMS_ADDR_LOW);
 
        if (valid_batchbuffer_addr(dev, aps)) {
                dev->aps = aps;