PCI: layerscape: Add LS1046a support

Add support for the LS1046a PCIe controller.  This device has a different
LUT_DBG offset, so add "lut_dbg" to ls_pcie_drvdata to
describe this difference.

[bhelgaas: changelog, remove now-unused PCIE_LUT_DBG]
Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

diff --git a/Documentation/devicetree/bindings/pci/layerscape-pci.txt b/Documentation/devicetree/bindings/pci/layerscape-pci.txt
index 41e9f55a1467c48716f9347cdee87bdc4f53d598..ee1c72d5162ea191ca9a83fd8dcd7baac21312fa 100644 (file)
--- a/Documentation/devicetree/bindings/pci/layerscape-pci.txt
+++ b/Documentation/devicetree/bindings/pci/layerscape-pci.txt
@@ -15,6 +15,7 @@ Required properties:
 - compatible: should contain the platform identifier such as:
         "fsl,ls1021a-pcie", "snps,dw-pcie"
         "fsl,ls2080a-pcie", "fsl,ls2085a-pcie", "snps,dw-pcie"
+        "fsl,ls1046a-pcie"
 - reg: base addresses and lengths of the PCIe controller
 - interrupts: A list of interrupt outputs of the controller. Must contain an
   entry for each entry in the interrupt-names property.

diff --git a/drivers/pci/host/pci-layerscape.c b/drivers/pci/host/pci-layerscape.c
index bbd3d232b934b4cf1ce07330cf2d7fc20e109754..ca48ceb6ebaf75f198677a28a605bb81dc8fbc43 100644 (file)
--- a/drivers/pci/host/pci-layerscape.c
+++ b/drivers/pci/host/pci-layerscape.c
@@ -35,12 +35,10 @@
 #define PCIE_STRFMR1           0x71c /* Symbol Timer & Filter Mask Register1 */
 #define PCIE_DBI_RO_WR_EN      0x8bc /* DBI Read-Only Write Enable Register */
 
-/* PEX LUT registers */
-#define PCIE_LUT_DBG           0x7FC /* PEX LUT Debug Register */
-
 struct ls_pcie_drvdata {
        u32 lut_offset;
        u32 ltssm_shift;
+       u32 lut_dbg;
        struct pcie_host_ops *ops;
 };
 
@@ -134,7 +132,7 @@ static int ls_pcie_link_up(struct pcie_port *pp)
        struct ls_pcie *pcie = to_ls_pcie(pp);
        u32 state;
 
-       state = (ioread32(pcie->lut + PCIE_LUT_DBG) >>
+       state = (ioread32(pcie->lut + pcie->drvdata->lut_dbg) >>
                 pcie->drvdata->ltssm_shift) &
                 LTSSM_STATE_MASK;
 
@@ -196,18 +194,28 @@ static struct ls_pcie_drvdata ls1021_drvdata = {
 static struct ls_pcie_drvdata ls1043_drvdata = {
        .lut_offset = 0x10000,
        .ltssm_shift = 24,
+       .lut_dbg = 0x7fc,
+       .ops = &ls_pcie_host_ops,
+};
+
+static struct ls_pcie_drvdata ls1046_drvdata = {
+       .lut_offset = 0x80000,
+       .ltssm_shift = 24,
+       .lut_dbg = 0x407fc,
        .ops = &ls_pcie_host_ops,
 };
 
 static struct ls_pcie_drvdata ls2080_drvdata = {
        .lut_offset = 0x80000,
        .ltssm_shift = 0,
+       .lut_dbg = 0x7fc,
        .ops = &ls_pcie_host_ops,
 };
 
 static const struct of_device_id ls_pcie_of_match[] = {
        { .compatible = "fsl,ls1021a-pcie", .data = &ls1021_drvdata },
        { .compatible = "fsl,ls1043a-pcie", .data = &ls1043_drvdata },
+       { .compatible = "fsl,ls1046a-pcie", .data = &ls1046_drvdata },
        { .compatible = "fsl,ls2080a-pcie", .data = &ls2080_drvdata },
        { .compatible = "fsl,ls2085a-pcie", .data = &ls2080_drvdata },
        { },