MIPS: ralink: add support for MT7620n

This is the small version of MT7620a.

Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/8030/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/include/asm/mach-ralink/mt7620.h b/arch/mips/include/asm/mach-ralink/mt7620.h
index a05c14c23155bd1c181bf95d84d74a13c35d8698..863aea5dcf0ce9cc6f6efdde33fc521f19bf4486 100644 (file)
--- a/arch/mips/include/asm/mach-ralink/mt7620.h
+++ b/arch/mips/include/asm/mach-ralink/mt7620.h
@@ -25,11 +25,8 @@
 #define SYSC_REG_CPLL_CONFIG0          0x54
 #define SYSC_REG_CPLL_CONFIG1          0x58
 
-#define MT7620N_CHIP_NAME0             0x33365452
-#define MT7620N_CHIP_NAME1             0x20203235
-
-#define MT7620A_CHIP_NAME0             0x3637544d
-#define MT7620A_CHIP_NAME1             0x20203032
+#define MT7620_CHIP_NAME0              0x3637544d
+#define MT7620_CHIP_NAME1              0x20203032
 
 #define SYSCFG0_XTAL_FREQ_SEL          BIT(6)
 

diff --git a/arch/mips/ralink/mt7620.c b/arch/mips/ralink/mt7620.c
index 24fb40a441ca5749d54152e0cc717deb41d8503b..e4b1f8251de1ce3c23d968e2f08debe259b7f3f8 100644 (file)
--- a/arch/mips/ralink/mt7620.c
+++ b/arch/mips/ralink/mt7620.c
@@ -277,6 +277,7 @@ void __init ralink_clk_init(void)
        ralink_clk_add("10000500.uart", periph_rate);
        ralink_clk_add("10000b00.spi", sys_rate);
        ralink_clk_add("10000c00.uartlite", periph_rate);
+       ralink_clk_add("10180000.wmac", xtal_rate);
 }
 
 void __init ralink_of_remap(void)
@@ -298,22 +299,27 @@ void prom_soc_init(struct ralink_soc_info *soc_info)
        u32 cfg0;
        u32 pmu0;
        u32 pmu1;
+       u32 bga;
 
        n0 = __raw_readl(sysc + SYSC_REG_CHIP_NAME0);
        n1 = __raw_readl(sysc + SYSC_REG_CHIP_NAME1);
+       rev = __raw_readl(sysc + SYSC_REG_CHIP_REV);
+       bga = (rev >> CHIP_REV_PKG_SHIFT) & CHIP_REV_PKG_MASK;
 
-       if (n0 == MT7620N_CHIP_NAME0 && n1 == MT7620N_CHIP_NAME1) {
-               name = "MT7620N";
-               soc_info->compatible = "ralink,mt7620n-soc";
-       } else if (n0 == MT7620A_CHIP_NAME0 && n1 == MT7620A_CHIP_NAME1) {
+       if (n0 != MT7620_CHIP_NAME0 || n1 != MT7620_CHIP_NAME1)
+               panic("mt7620: unknown SoC, n0:%08x n1:%08x\n", n0, n1);
+
+       if (bga) {
                name = "MT7620A";
                soc_info->compatible = "ralink,mt7620a-soc";
        } else {
-               panic("mt7620: unknown SoC, n0:%08x n1:%08x", n0, n1);
+               name = "MT7620N";
+               soc_info->compatible = "ralink,mt7620n-soc";
+#ifdef CONFIG_PCI
+               panic("mt7620n is only supported for non pci kernels");
+#endif
        }
 
-       rev = __raw_readl(sysc + SYSC_REG_CHIP_REV);
-
        snprintf(soc_info->sys_type, RAMIPS_SYS_TYPE_LEN,
                "Ralink %s ver:%u eco:%u",
                name,