static int num_cpu_op;
/* working point(wp): 0 - 1.2GHz; 1 - 792MHz, 2 - 498MHz 3 - 396MHz */
-static struct cpu_op mx6_cpu_op_1_2G[] = {
+static struct cpu_op mx6q_cpu_op_1_2G[] = {
{
.pll_rate = 1200000000,
.cpu_rate = 1200000000,
};
/* working point(wp): 0 - 1GHz; 1 - 792MHz, 2 - 498MHz 3 - 396MHz */
-static struct cpu_op mx6_cpu_op_1G[] = {
+static struct cpu_op mx6q_cpu_op_1G[] = {
{
.pll_rate = 996000000,
.cpu_rate = 996000000,
#endif
};
-static struct cpu_op mx6_cpu_op[] = {
+static struct cpu_op mx6q_cpu_op[] = {
{
.pll_rate = 792000000,
.cpu_rate = 792000000,
.cpu_voltage = 1025000,},
};
+static struct cpu_op mx6sl_cpu_op_1G[] = {
+ {
+ .pll_rate = 996000000,
+ .cpu_rate = 996000000,
+ .cpu_podf = 0,
+ .pu_voltage = 1225000,
+ .soc_voltage = 1225000,
+ .cpu_voltage = 1275000,},
+ {
+ .pll_rate = 792000000,
+ .cpu_rate = 792000000,
+ .cpu_podf = 0,
+ .pu_voltage = 1150000,
+ .soc_voltage = 1150000,
+ .cpu_voltage = 1200000,},
+ {
+ .pll_rate = 396000000,
+ .cpu_rate = 396000000,
+ .cpu_podf = 0,
+ .pu_voltage = 1050000,
+ .soc_voltage = 1050000,
+ .cpu_voltage = 1100000,},
+ {
+ .pll_rate = 396000000,
+ .cpu_rate = 198000000,
+ .cpu_podf = 1,
+ .pu_voltage = 1050000,
+ .soc_voltage = 1050000,
+ .cpu_voltage = 1050000,},
+};
+
+static struct cpu_op mx6sl_cpu_op[] = {
+ {
+ .pll_rate = 792000000,
+ .cpu_rate = 792000000,
+ .cpu_podf = 0,
+ .pu_voltage = 1150000,
+ .soc_voltage = 1150000,
+ .cpu_voltage = 1200000,},
+ {
+ .pll_rate = 396000000,
+ .cpu_rate = 396000000,
+ .cpu_podf = 0,
+ .pu_voltage = 1050000,
+ .soc_voltage = 1050000,
+ .cpu_voltage = 1100000,},
+ {
+ .pll_rate = 396000000,
+ .cpu_rate = 198000000,
+ .cpu_podf = 1,
+ .pu_voltage = 1050000,
+ .soc_voltage = 1050000,
+ .cpu_voltage = 1050000,},
+};
+
static struct dvfs_op dvfs_core_setpoint_1_2G[] = {
{33, 14, 33, 10, 128, 0x10}, /* 1.2GHz*/
{30, 12, 33, 100, 200, 0x10}, /* 800MHz */
*op = num_cpu_op = ARRAY_SIZE(mx6dl_cpu_op);
return mx6dl_cpu_op;
}
- } else {
+ } else if (cpu_is_mx6q()) {
if (arm_max_freq == CPU_AT_1_2GHz) {
- *op = num_cpu_op = ARRAY_SIZE(mx6_cpu_op_1_2G);
- return mx6_cpu_op_1_2G;
+ *op = num_cpu_op = ARRAY_SIZE(mx6q_cpu_op_1_2G);
+ return mx6q_cpu_op_1_2G;
} else if (arm_max_freq == CPU_AT_1GHz) {
- *op = num_cpu_op = ARRAY_SIZE(mx6_cpu_op_1G);
- return mx6_cpu_op_1G;
+ *op = num_cpu_op = ARRAY_SIZE(mx6q_cpu_op_1G);
+ return mx6q_cpu_op_1G;
+ } else {
+ *op = num_cpu_op = ARRAY_SIZE(mx6q_cpu_op);
+ return mx6q_cpu_op;
+ }
+ } else {
+ if (arm_max_freq == CPU_AT_1GHz) {
+ *op = num_cpu_op = ARRAY_SIZE(mx6sl_cpu_op_1G);
+ return mx6sl_cpu_op_1G;
} else {
- *op = num_cpu_op = ARRAY_SIZE(mx6_cpu_op);
- return mx6_cpu_op;
+ *op = num_cpu_op = ARRAY_SIZE(mx6sl_cpu_op);
+ return mx6sl_cpu_op;
}
}
}