mxc_iomux_set_gpr_register(1, 13, 1, 1);
mx6_set_otghost_vbus_func(imx6_arm2_usbotg_vbus);
- mx6_usb_dr_init();
+
#ifdef CONFIG_USB_EHCI_ARC_HSIC
mx6_usb_h2_init();
mx6_usb_h3_init();
mxc_iomux_set_gpr_register(1, 13, 1, 0);
mx6_set_otghost_vbus_func(imx6q_sabreauto_usbotg_vbus);
- mx6_usb_dr_init();
mx6_set_host1_vbus_func(imx6q_sabreauto_usbhost1_vbus);
#ifdef CONFIG_USB_EHCI_ARC_HSIC
mx6_usb_h2_init();
mxc_iomux_set_gpr_register(1, 13, 1, 1);
mx6_set_otghost_vbus_func(imx6q_sabrelite_usbotg_vbus);
- mx6_usb_dr_init();
}
/* HW Initialization, if return 0, initialization is successful. */
mxc_iomux_set_gpr_register(1, 13, 1, 0);
mx6_set_otghost_vbus_func(imx6q_sabresd_usbotg_vbus);
- mx6_usb_dr_init();
+
}
/* HW Initialization, if return 0, initialization is successful. */
gpio_direction_output(MX6_BRD_USBOTG2_PWR, 1);
mx6_set_otghost_vbus_func(imx6_arm2_usbotg_vbus);
- mx6_usb_dr_init();
#ifdef CONFIG_USB_EHCI_ARC_HSIC
mxc_iomux_set_specialbits_register(MX6SL_PAD_HSIC_DAT,
PAD_CTL_DDR_SEL_DDR3, PAD_CTL_DDR_SEL_MASK);
gpio_direction_output(MX6_BRD_USBOTG2_PWR, 1);
mx6_set_otghost_vbus_func(imx6_evk_usbotg_vbus);
- mx6_usb_dr_init();
+
#ifdef CONFIG_USB_EHCI_ARC_HSIC
mx6_usb_h2_init();
#endif
static void usbotg_clock_gate(bool on);
static void _dr_discharge_line(bool enable);
extern bool usb_icbug_swfix_need(void);
+static void enter_phy_lowpower_suspend(struct fsl_usb2_platform_data *pdata, \
+ bool enable);
/* The usb_phy1_clk do not have enable/disable function at clock.c
* and PLL output for usb1's phy should be always enabled.
return ret;
}
if (!otg_used) {
- usbotg_internal_phy_clock_gate(true);
usb_phy_enable(pdev->dev.platform_data);
+ enter_phy_lowpower_suspend(pdev->dev.platform_data, false);
/*after the phy reset,can not read the readingvalue for id/vbus at
* the register of otgsc ,cannot read at once ,need delay 3 ms
*/
static void usbotg_uninit_ext(struct platform_device *pdev)
{
- struct fsl_usb2_platform_data *pdata = pdev->dev.platform_data;
-
- clk_disable(usb_phy1_clk);
- clk_put(usb_phy1_clk);
+ otg_used--;
+ if (!otg_used) {
+ enter_phy_lowpower_suspend(pdev->dev.platform_data, true);
+ mdelay(3);
- clk_disable(usb_oh3_clk);
- clk_put(usb_oh3_clk);
+ clk_disable(usb_phy1_clk);
+ clk_put(usb_phy1_clk);
- usbotg_uninit(pdata);
- otg_used--;
+ clk_disable(usb_oh3_clk);
+ clk_put(usb_oh3_clk);
+ }
}
static void usbotg_clock_gate(bool on)
anatop_base_addr + HW_ANADIG_ANA_MISC0_SET);
}
-void mx6_set_otghost_vbus_func(driver_vbus_func driver_vbus)
-{
- dr_utmi_config.platform_driver_vbus = driver_vbus;
-}
static void _dr_discharge_line(bool enable)
{
/* end of device related operation for DR port */
#endif /* CONFIG_USB_GADGET_ARC */
-void __init mx6_usb_dr_init(void)
+static struct platform_device *pdev[3], *pdev_wakeup;
+static driver_vbus_func mx6_set_usb_otg_vbus;
+static int devnum;
+static int __init mx6_usb_dr_init(void)
{
- struct platform_device *pdev, *pdev_wakeup;
+ int i = 0;
void __iomem *anatop_base_addr = MX6_IO_ADDRESS(ANATOP_BASE_ADDR);
+ struct imx_fsl_usb2_wakeup_data imx6q_fsl_otg_wakeup_data =
+ imx_fsl_usb2_wakeup_data_entry_single(MX6Q, 0, OTG);
+ struct imx_mxc_ehci_data imx6q_mxc_ehci_otg_data =
+ imx_mxc_ehci_data_entry_single(MX6Q, 0, OTG);
+ struct imx_fsl_usb2_udc_data imx6q_fsl_usb2_udc_data =
+ imx_fsl_usb2_udc_data_entry_single(MX6Q);
+ struct imx_fsl_usb2_otg_data imx6q_fsl_usb2_otg_data =
+ imx_fsl_usb2_otg_data_entry_single(MX6Q);
+
+ /* Some phy and power's special controls for otg
+ * 1. The external charger detector needs to be disabled
+ * or the signal at DP will be poor
+ * 2. The EN_USB_CLKS is always enabled.
+ * The PLL's power is controlled by usb and others who
+ * use pll3 too.
+ */
+ __raw_writel(BM_ANADIG_USB1_CHRG_DETECT_EN_B \
+ | BM_ANADIG_USB1_CHRG_DETECT_CHK_CHRG_B, \
+ anatop_base_addr + HW_ANADIG_USB1_CHRG_DETECT);
+ __raw_writel(BM_ANADIG_USB1_PLL_480_CTRL_EN_USB_CLKS,
+ anatop_base_addr + HW_ANADIG_USB1_PLL_480_CTRL_SET);
+ mx6_get_otghost_vbus_func(&mx6_set_usb_otg_vbus);
+ dr_utmi_config.platform_driver_vbus = mx6_set_usb_otg_vbus;
#ifdef CONFIG_USB_OTG
/* wake_up_enable is useless, just for usb_register_remote_wakeup execution*/
dr_utmi_config.wake_up_enable = _device_wakeup_enable;
dr_utmi_config.operating_mode = FSL_USB2_DR_OTG;
dr_utmi_config.wakeup_pdata = &dr_wakeup_config;
- pdev = imx6q_add_fsl_usb2_otg(&dr_utmi_config);
- dr_wakeup_config.usb_pdata[0] = pdev->dev.platform_data;
+ pdev[i] = imx6q_add_fsl_usb2_otg(&dr_utmi_config);
+ dr_wakeup_config.usb_pdata[i] = pdev[i]->dev.platform_data;
+ i++;
#endif
#ifdef CONFIG_USB_EHCI_ARC_OTG
dr_utmi_config.operating_mode = DR_HOST_MODE;
dr_utmi_config.wakeup_pdata = &dr_wakeup_config;
dr_utmi_config.wakeup_handler = host_wakeup_handler;
dr_utmi_config.platform_phy_power_on = dr_platform_phy_power_on;
- pdev = imx6q_add_fsl_ehci_otg(&dr_utmi_config);
- dr_wakeup_config.usb_pdata[1] = pdev->dev.platform_data;
+ pdev[i] = imx6q_add_fsl_ehci_otg(&dr_utmi_config);
+ dr_wakeup_config.usb_pdata[i] = pdev[i]->dev.platform_data;
+ i++;
#endif
#ifdef CONFIG_USB_GADGET_ARC
dr_utmi_config.operating_mode = DR_UDC_MODE;
dr_utmi_config.wakeup_handler = device_wakeup_handler;
dr_utmi_config.charger_base_addr = anatop_base_addr;
dr_utmi_config.platform_phy_power_on = dr_platform_phy_power_on;
- pdev = imx6q_add_fsl_usb2_udc(&dr_utmi_config);
- dr_wakeup_config.usb_pdata[2] = pdev->dev.platform_data;
+ pdev[i] = imx6q_add_fsl_usb2_udc(&dr_utmi_config);
+ dr_wakeup_config.usb_pdata[i] = pdev[i]->dev.platform_data;
+ i++;
#endif
+ devnum = i;
/* register wakeup device */
pdev_wakeup = imx6q_add_fsl_usb2_otg_wakeup(&dr_wakeup_config);
- if (pdev != NULL)
- ((struct fsl_usb2_platform_data *)(pdev->dev.platform_data))->wakeup_pdata =
+ for (i = 0; i < devnum; i++) {
+ platform_device_add(pdev[i]);
+ ((struct fsl_usb2_platform_data *)(pdev[i]->dev.platform_data))->wakeup_pdata =
(struct fsl_usb2_wakeup_platform_data *)(pdev_wakeup->dev.platform_data);
+ }
+
+ return 0;
+}
+arch_initcall(mx6_usb_dr_init);
+
+static void __exit mx6_usb_dr_exit(void)
+{
+ int i;
+ void __iomem *anatop_base_addr = MX6_IO_ADDRESS(ANATOP_BASE_ADDR);
+
+ for (i = 0; i < devnum; i++)
+ platform_device_del(pdev[devnum-i-1]);
+ platform_device_unregister(pdev_wakeup);
+ otg_used = 0;
- /* Some phy and power's special controls for otg
- * 1. The external charger detector needs to be disabled
- * or the signal at DP will be poor
- * 2. The EN_USB_CLKS is always enabled.
- * The PLL's power is controlled by usb and others who
- * use pll3 too.
- */
- __raw_writel(BM_ANADIG_USB1_CHRG_DETECT_EN_B \
- | BM_ANADIG_USB1_CHRG_DETECT_CHK_CHRG_B, \
- anatop_base_addr + HW_ANADIG_USB1_CHRG_DETECT);
__raw_writel(BM_ANADIG_USB1_PLL_480_CTRL_EN_USB_CLKS,
- anatop_base_addr + HW_ANADIG_USB1_PLL_480_CTRL_SET);
+ anatop_base_addr + HW_ANADIG_USB1_PLL_480_CTRL_CLR);
+ return ;
}
+module_exit(mx6_usb_dr_exit);
+
+MODULE_AUTHOR("Freescale Semiconductor");
+MODULE_LICENSE("GPL");
struct imx_mxc_ehci_data imx6sl_mxc_ehci_hs_data[] = {
imx_mxc_ehci_data_entry_single(MX6SL, 1, HS1)};
- mx6_set_usb_host1_vbus_func(&mx6_set_usb_host1_vbus);
+ mx6_get_host1_vbus_func(&mx6_set_usb_host1_vbus);
if (mx6_set_usb_host1_vbus)
mx6_set_usb_host1_vbus(true);
pdev_wakeup = imx6sl_add_fsl_usb2_hs_wakeup(1, &usbh1_wakeup_config);
else
pdev_wakeup = imx6q_add_fsl_usb2_hs_wakeup(1, &usbh1_wakeup_config);
+ platform_device_add(pdev);
((struct fsl_usb2_platform_data *)(pdev->dev.platform_data))->wakeup_pdata =
(struct fsl_usb2_wakeup_platform_data *)(pdev_wakeup->dev.platform_data);
return 0;
}
-module_init(mx6_usb_h1_init);
+arch_initcall(mx6_usb_h1_init);
static void __exit mx6_usb_h1_exit(void)
{
pdev_wakeup = imx6sl_add_fsl_usb2_hs_wakeup(2, &usbh2_wakeup_config);
else
pdev_wakeup = imx6q_add_fsl_usb2_hs_wakeup(2, &usbh2_wakeup_config);
+ platform_device_add(pdev);
((struct fsl_usb2_platform_data *)(pdev->dev.platform_data))->wakeup_pdata =
pdev_wakeup->dev.platform_data;
/* Some phy and power's special controls for host2
pdev = imx6q_add_fsl_ehci_hs(3, &usbh3_config);
usbh3_wakeup_config.usb_pdata[0] = pdev->dev.platform_data;
pdev_wakeup = imx6q_add_fsl_usb2_hs_wakeup(3, &usbh3_wakeup_config);
+ platform_device_add(pdev);
((struct fsl_usb2_platform_data *)(pdev->dev.platform_data))->wakeup_pdata =
pdev_wakeup->dev.platform_data;
/*
- * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (C) 2011-2012 Freescale Semiconductor, Inc. All Rights Reserved.
*
* Based on Uwe Kleine-Koenig's platform-fsl-usb2-udc.c
* Copyright (C) 2010 Pengutronix
.flags = IORESOURCE_IRQ,
},
};
- return imx_add_platform_device_dmamask("fsl-usb2-otg", -1,
- res, ARRAY_SIZE(res),
- pdata, sizeof(*pdata), DMA_BIT_MASK(32));
+
+ int ret = -ENOMEM;
+ const char *name = "fsl-usb2-otg";
+ int id = -1;
+ unsigned int num_resources = ARRAY_SIZE(res);
+ size_t size_data = sizeof(*pdata);
+ u64 dmamask = DMA_BIT_MASK(32);
+ struct platform_device *pdev;
+
+ pdev = platform_device_alloc(name, id);
+ if (!pdev)
+ goto err;
+
+ if (dmamask) {
+ /*
+ * This memory isn't freed when the device is put,
+ * I don't have a nice idea for that though. Conceptually
+ * dma_mask in struct device should not be a pointer.
+ * See http://thread.gmane.org/gmane.linux.kernel.pci/9081
+ */
+ pdev->dev.dma_mask =
+ kmalloc(sizeof(*pdev->dev.dma_mask), GFP_KERNEL);
+ if (!pdev->dev.dma_mask)
+ /* ret is still -ENOMEM; */
+ goto err;
+
+ *pdev->dev.dma_mask = dmamask;
+ pdev->dev.coherent_dma_mask = dmamask;
+ }
+
+ ret = platform_device_add_resources(pdev, res, num_resources);
+ if (ret)
+ goto err;
+
+ if (data) {
+ ret = platform_device_add_data(pdev, pdata, size_data);
+ if (ret)
+ goto err;
+ }
+
+ return pdev;
+err:
+ if (dmamask)
+ kfree(pdev->dev.dma_mask);
+ platform_device_put(pdev);
+ return ERR_PTR(ret);
}
+EXPORT_SYMBOL(imx_add_fsl_usb2_otg);
/*
- * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (C) 2011-2012 Freescale Semiconductor, Inc. All Rights Reserved.
*
* Copyright (C) 2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
.flags = IORESOURCE_IRQ,
},
};
- return imx_add_platform_device_dmamask("fsl-usb2-udc", -1,
- res, ARRAY_SIZE(res),
- pdata, sizeof(*pdata), DMA_BIT_MASK(32));
+
+ int ret = -ENOMEM;
+ const char *name = "fsl-usb2-udc";
+ int id = -1;
+ unsigned int num_resources = ARRAY_SIZE(res);
+ size_t size_data = sizeof(*pdata);
+ u64 dmamask = DMA_BIT_MASK(32);
+ struct platform_device *pdev;
+
+ pdev = platform_device_alloc(name, id);
+ if (!pdev)
+ goto err;
+
+ if (dmamask) {
+ /*
+ * This memory isn't freed when the device is put,
+ * I don't have a nice idea for that though. Conceptually
+ * dma_mask in struct device should not be a pointer.
+ * See http://thread.gmane.org/gmane.linux.kernel.pci/9081
+ */
+ pdev->dev.dma_mask =
+ kmalloc(sizeof(*pdev->dev.dma_mask), GFP_KERNEL);
+ if (!pdev->dev.dma_mask)
+ /* ret is still -ENOMEM; */
+ goto err;
+
+ *pdev->dev.dma_mask = dmamask;
+ pdev->dev.coherent_dma_mask = dmamask;
+ }
+
+ ret = platform_device_add_resources(pdev, res, num_resources);
+ if (ret)
+ goto err;
+
+ if (data) {
+ ret = platform_device_add_data(pdev, pdata, size_data);
+ if (ret)
+ goto err;
+ }
+
+ return pdev;
+
+err:
+ if (dmamask)
+ kfree(pdev->dev.dma_mask);
+ platform_device_put(pdev);
+ return ERR_PTR(ret);
}
+EXPORT_SYMBOL(imx_add_fsl_usb2_udc);
.flags = IORESOURCE_IRQ,
},
};
- return imx_add_platform_device_dmamask("fsl-ehci", data->id,
- res, ARRAY_SIZE(res),
- pdata, sizeof(*pdata), DMA_BIT_MASK(32));
+ int ret = -ENOMEM;
+ const char *name = "fsl-ehci";
+ int id = data->id;
+ unsigned int num_resources = ARRAY_SIZE(res);
+ size_t size_data = sizeof(*pdata);
+ u64 dmamask = DMA_BIT_MASK(32);
+ struct platform_device *pdev;
+
+ pdev = platform_device_alloc(name, id);
+ if (!pdev)
+ goto err;
+
+ if (dmamask) {
+ /*
+ * This memory isn't freed when the device is put,
+ * I don't have a nice idea for that though. Conceptually
+ * dma_mask in struct device should not be a pointer.
+ * See http://thread.gmane.org/gmane.linux.kernel.pci/9081
+ */
+ pdev->dev.dma_mask =
+ kmalloc(sizeof(*pdev->dev.dma_mask), GFP_KERNEL);
+ if (!pdev->dev.dma_mask)
+ /* ret is still -ENOMEM; */
+ goto err;
+
+ *pdev->dev.dma_mask = dmamask;
+ pdev->dev.coherent_dma_mask = dmamask;
+ }
+
+ ret = platform_device_add_resources(pdev, res, num_resources);
+ if (ret)
+ goto err;
+
+ if (data) {
+ ret = platform_device_add_data(pdev, pdata, size_data);
+ if (ret)
+ goto err;
+ }
+
+ return pdev;
+
+err:
+ if (dmamask)
+ kfree(pdev->dev.dma_mask);
+ platform_device_put(pdev);
+ return ERR_PTR(ret);
+
}
EXPORT_SYMBOL(imx_add_fsl_ehci);
typedef void (*driver_vbus_func)(bool);
void __iomem *imx_otg_base;
-static driver_vbus_func s_driver_vbus;
+static driver_vbus_func s_h1_driver_vbus;
+static driver_vbus_func s_otg_driver_vbus;
EXPORT_SYMBOL(imx_otg_base);
void mx6_set_host1_vbus_func(driver_vbus_func driver_vbus)
{
- s_driver_vbus = driver_vbus;
+ s_h1_driver_vbus = driver_vbus;
}
-void mx6_set_usb_host1_vbus_func(driver_vbus_func *driver_vbus)
+void mx6_get_host1_vbus_func(driver_vbus_func *driver_vbus)
{
- *driver_vbus = s_driver_vbus;
+ *driver_vbus = s_h1_driver_vbus;
}
-EXPORT_SYMBOL(mx6_set_usb_host1_vbus_func);
+EXPORT_SYMBOL(mx6_get_host1_vbus_func);
+
+void mx6_set_otghost_vbus_func(driver_vbus_func driver_vbus)
+{
+ s_otg_driver_vbus = driver_vbus;
+}
+
+void mx6_get_otghost_vbus_func(driver_vbus_func *driver_vbus)
+{
+ *driver_vbus = s_otg_driver_vbus;
+}
+EXPORT_SYMBOL(mx6_get_otghost_vbus_func);
+
enum fsl_usb2_modes get_usb_mode(struct fsl_usb2_platform_data *pdata)