ENGR00152287-1 MX6: Add SDMA support for MX6Q

Add SDMA support for MX6Q.
Enable sdma in imx6 default configure.

Signed-off-by: Zeng Zhaoming <b32542@freescale.com>

diff --git a/arch/arm/configs/imx6_defconfig b/arch/arm/configs/imx6_defconfig
index 0c76232c6b3f4da343ffb368db9dcda47fff65c0..00508aee8233f3943e464b3dfb4f1a88c77ea63c 100644 (file)
--- a/arch/arm/configs/imx6_defconfig
+++ b/arch/arm/configs/imx6_defconfig
@@ -1613,7 +1613,23 @@ CONFIG_RTC_DRV_SNVS=y
 #
 # on-CPU RTC drivers
 #
-# CONFIG_DMADEVICES is not set
+CONFIG_DMADEVICES=y
+# CONFIG_DMADEVICES_DEBUG is not set
+
+#
+# DMA Devices
+#
+# CONFIG_MXC_PXP is not set
+# CONFIG_TIMB_DMA is not set
+CONFIG_IMX_SDMA=y
+CONFIG_DMA_ENGINE=y
+
+#
+# DMA Clients
+#
+# CONFIG_NET_DMA is not set
+# CONFIG_ASYNC_TX_DMA is not set
+# CONFIG_DMATEST is not set
 # CONFIG_AUXDISPLAY is not set
 # CONFIG_UIO is not set
 # CONFIG_STAGING is not set

diff --git a/arch/arm/plat-mxc/include/mach/mx6.h b/arch/arm/plat-mxc/include/mach/mx6.h
index 48d90f67a71026ba4ff546721e4bbec94c514f0b..a836788ddfbf7e8edbd83ac381f424cf3d22a118 100644 (file)
--- a/arch/arm/plat-mxc/include/mach/mx6.h
+++ b/arch/arm/plat-mxc/include/mach/mx6.h
@@ -405,4 +405,64 @@
 
 #define IRQ_LOCALTIMER                         29
 
+/*
+ * DMA request assignments
+ */
+#define MX6Q_DMA_REQ_VPU               0
+#define MX6Q_DMA_REQ_GPC               1
+#define MX6Q_DMA_REQ_IPU1              2
+#define MX6Q_DMA_REQ_EXT_DMA_REQ_0     2
+#define MX6Q_DMA_REQ_CSPI1_RX          3
+#define MX6Q_DMA_REQ_I2C3_A            3
+#define MX6Q_DMA_REQ_CSPI1_TX          4
+#define MX6Q_DMA_REQ_I2C2_A            4
+#define MX6Q_DMA_REQ_CSPI2_RX          5
+#define MX6Q_DMA_REQ_I2C1_A            5
+#define MX6Q_DMA_REQ_CSPI2_TX          6
+#define MX6Q_DMA_REQ_CSPI3_RX          7
+#define MX6Q_DMA_REQ_CSPI3_TX          8
+#define MX6Q_DMA_REQ_CSPI4_RX          9
+#define MX6Q_DMA_REQ_EPIT2             9
+#define MX6Q_DMA_REQ_CSPI4_TX          10
+#define MX6Q_DMA_REQ_I2C1_B            10
+#define MX6Q_DMA_REQ_CSPI5_RX          11
+#define MX6Q_DMA_REQ_CSPI5_TX          12
+#define MX6Q_DMA_REQ_GPT               13
+#define MX6Q_DMA_REQ_SPDIF_RX          14
+#define MX6Q_DMA_REQ_EXT_DMA_REQ_1     14
+#define MX6Q_DMA_REQ_SPDIF_TX          15
+#define MX6Q_DMA_REQ_EPIT1             16
+#define MX6Q_DMA_REQ_ASRC_RX1          17
+#define MX6Q_DMA_REQ_ASRC_RX2          18
+#define MX6Q_DMA_REQ_ASRC_RX3          19
+#define MX6Q_DMA_REQ_ASRC_TX1          20
+#define MX6Q_DMA_REQ_ASRC_TX2          21
+#define MX6Q_DMA_REQ_ASRC_TX3          22
+#define MX6Q_DMA_REQ_ESAI_RX           23
+#define MX6Q_DMA_REQ_I2C3_B            23
+#define MX6Q_DMA_REQ_ESAI_TX           24
+#define MX6Q_DMA_REQ_UART1_RX          25
+#define MX6Q_DMA_REQ_UART1_TX          26
+#define MX6Q_DMA_REQ_UART2_RX          27
+#define MX6Q_DMA_REQ_UART2_TX          28
+#define MX6Q_DMA_REQ_UART3_RX          29
+#define MX6Q_DMA_REQ_UART3_TX          30
+#define MX6Q_DMA_REQ_UART4_RX          31
+#define MX6Q_DMA_REQ_UART4_TX          32
+#define MX6Q_DMA_REQ_UART5_RX          33
+#define MX6Q_DMA_REQ_UART5_TX          34
+#define MX6Q_DMA_REQ_SSI1_RX1          35
+#define MX6Q_DMA_REQ_SSI1_TX1          36
+#define MX6Q_DMA_REQ_SSI1_RX0          37
+#define MX6Q_DMA_REQ_SSI1_TX0          38
+#define MX6Q_DMA_REQ_SSI2_RX1          39
+#define MX6Q_DMA_REQ_SSI2_TX1          40
+#define MX6Q_DMA_REQ_SSI2_RX0          41
+#define MX6Q_DMA_REQ_SSI2_TX0          42
+#define MX6Q_DMA_REQ_SSI3_RX1          43
+#define MX6Q_DMA_REQ_SSI3_TX1          44
+#define MX6Q_DMA_REQ_SSI3_RX0          45
+#define MX6Q_DMA_REQ_SSI3_TX0          46
+#define MX6Q_DMA_REQ_DTCP              47
+
 #endif                         /*  __ASM_ARCH_MXC_MX6_H__ */