EDAC-CORE
P: Doug Thompson
-M: norsk5@xmission.com, dthompson@linuxnetworx.com
-P: Dave Peterson
-M: dsp@llnl.gov, dave_peterson@pobox.com
+M: norsk5@xmission.com
L: bluesmoke-devel@lists.sourceforge.net
W: bluesmoke.sourceforge.net
-S: Maintained
+S: Supported
EDAC-E752X
-P: Dave Peterson
-M: dsp@llnl.gov, dave_peterson@pobox.com
+P: Mark Gross
+M: mark.gross@intel.com
L: bluesmoke-devel@lists.sourceforge.net
W: bluesmoke.sourceforge.net
S: Maintained
EDAC-E7XXX
-P: Dave Peterson
-M: dsp@llnl.gov, dave_peterson@pobox.com
+P: Doug Thompson
+M: norsk5@xmission.com
L: bluesmoke-devel@lists.sourceforge.net
W: bluesmoke.sourceforge.net
S: Maintained
W: http://www.winischhofer.at/linuxsisusbvga.shtml
S: Maintained
- SMB FILESYSTEM
- P: Urban Widmark
- M: urban@teststation.com
- W: http://samba.org/
- L: samba@samba.org
- S: Maintained
-
SMC91x ETHERNET DRIVER
P: Nicolas Pitre
M: nico@cam.org
*
* Page table sludge for ARM v3 and v4 processor architectures.
*/
- #include <linux/config.h>
#include <linux/module.h>
#include <linux/mm.h>
#include <linux/init.h>
pte = pmd_page(*pmd);
pmd_clear(pmd);
- dec_page_state(nr_page_table_pages);
+ dec_zone_page_state(virt_to_page((unsigned long *)pgd), NR_PAGETABLE);
pte_lock_deinit(pte);
pte_free(pte);
pmd_free(pmd);
* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
*/
- #include <linux/config.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
goto err_free;
perf = data->acpi_data;
- policy->cpus = perf->shared_cpu_map;
policy->shared_type = perf->shared_type;
+ /*
+ * Will let policy->cpus know about dependency only when software
+ * coordination is required.
+ */
+ if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL ||
+ policy->shared_type == CPUFREQ_SHARED_TYPE_ANY)
+ policy->cpus = perf->shared_cpu_map;
if (cpu_has(c, X86_FEATURE_CONSTANT_TSC)) {
acpi_cpufreq_driver.flags |= CPUFREQ_CONST_LOOPS;
#include <linux/module.h>
#include <linux/init.h>
#include <linux/cpufreq.h>
- #include <linux/config.h>
#include <linux/sched.h> /* current */
#include <linux/delay.h>
#include <linux/compiler.h>
dprintk(PFX "obtaining ACPI data failed\n");
return -EIO;
}
- policy->cpus = p->shared_cpu_map;
policy->shared_type = p->shared_type;
+ /*
+ * Will let policy->cpus know about dependency only when software
+ * coordination is required.
+ */
+ if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL ||
+ policy->shared_type == CPUFREQ_SHARED_TYPE_ANY)
+ policy->cpus = p->shared_cpu_map;
/* verify the acpi_data */
if (p->state_count <= 1) {
*/
#include <linux/module.h>
- #include <linux/config.h>
#include <linux/types.h>
#include <linux/errno.h>
return err;
}
-static int msr_class_cpu_callback(struct notifier_block *nfb, unsigned long action, void *hcpu)
+#ifdef CONFIG_HOTPLUG_CPU
+static int msr_class_cpu_callback(struct notifier_block *nfb,
+ unsigned long action, void *hcpu)
{
unsigned int cpu = (unsigned long)hcpu;
{
.notifier_call = msr_class_cpu_callback,
};
+#endif
static int __init msr_init(void)
{
if (err != 0)
goto out_class;
}
- register_cpu_notifier(&msr_class_cpu_notifier);
+ register_hotcpu_notifier(&msr_class_cpu_notifier);
err = 0;
goto out;
class_device_destroy(msr_class, MKDEV(MSR_MAJOR, cpu));
class_destroy(msr_class);
unregister_chrdev(MSR_MAJOR, "cpu/msr");
- unregister_cpu_notifier(&msr_class_cpu_notifier);
+ unregister_hotcpu_notifier(&msr_class_cpu_notifier);
}
module_init(msr_init);
* This file provides all the same external entries as smp.c but uses
* the voyager hal to provide the functionality
*/
- #include <linux/config.h>
#include <linux/module.h>
#include <linux/mm.h>
#include <linux/kernel_stat.h>
{
zap_low_mappings();
}
+
+void __init
+smp_setup_processor_id(void)
+{
+ current_thread_info()->cpu = hard_smp_processor_id();
+}
* linux/arch/i386/mm/pgtable.c
*/
- #include <linux/config.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/errno.h>
struct page *page;
pg_data_t *pgdat;
unsigned long i;
- struct page_state ps;
unsigned long flags;
printk(KERN_INFO "Mem-info:\n");
printk(KERN_INFO "%d pages shared\n", shared);
printk(KERN_INFO "%d pages swap cached\n", cached);
- get_page_state(&ps);
- printk(KERN_INFO "%lu pages dirty\n", ps.nr_dirty);
- printk(KERN_INFO "%lu pages writeback\n", ps.nr_writeback);
- printk(KERN_INFO "%lu pages mapped\n", ps.nr_mapped);
- printk(KERN_INFO "%lu pages slab\n", ps.nr_slab);
- printk(KERN_INFO "%lu pages pagetables\n", ps.nr_page_table_pages);
+ printk(KERN_INFO "%lu pages dirty\n", global_page_state(NR_FILE_DIRTY));
+ printk(KERN_INFO "%lu pages writeback\n",
+ global_page_state(NR_WRITEBACK));
+ printk(KERN_INFO "%lu pages mapped\n", global_page_state(NR_FILE_MAPPED));
+ printk(KERN_INFO "%lu pages slab\n", global_page_state(NR_SLAB));
+ printk(KERN_INFO "%lu pages pagetables\n",
+ global_page_state(NR_PAGETABLE));
}
/*
* Author: Gerald Schaefer <gerald.schaefer@de.ibm.com>
*/
- #include <linux/config.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#endif /* MODULE */
EXPORT_SYMBOL_GPL(si_swapinfo);
EXPORT_SYMBOL_GPL(nr_threads);
-EXPORT_SYMBOL_GPL(get_full_page_state);
EXPORT_SYMBOL_GPL(nr_running);
EXPORT_SYMBOL_GPL(nr_iowait);
//EXPORT_SYMBOL_GPL(nr_context_switches);
* Author: Gerald Schaefer <gerald.schaefer@de.ibm.com>
*/
- #include <linux/config.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
* serialized through the appldata_ops_lock and can use static
*/
static struct sysinfo val;
- static struct page_state ps;
+ unsigned long ev[NR_VM_EVENT_ITEMS];
struct appldata_mem_data *mem_data;
mem_data = data;
mem_data->sync_count_1++;
- get_full_page_state(&ps);
- mem_data->pgpgin = ps.pgpgin >> 1;
- mem_data->pgpgout = ps.pgpgout >> 1;
- mem_data->pswpin = ps.pswpin;
- mem_data->pswpout = ps.pswpout;
- mem_data->pgalloc = ps.pgalloc_high + ps.pgalloc_normal +
- ps.pgalloc_dma;
- mem_data->pgfault = ps.pgfault;
- mem_data->pgmajfault = ps.pgmajfault;
+ all_vm_events(ev);
+ mem_data->pgpgin = ev[PGPGIN] >> 1;
+ mem_data->pgpgout = ev[PGPGOUT] >> 1;
+ mem_data->pswpin = ev[PSWPIN];
+ mem_data->pswpout = ev[PSWPOUT];
+ mem_data->pgalloc = ev[PGALLOC_HIGH] + ev[PGALLOC_NORMAL] +
+ ev[PGALLOC_DMA];
+ mem_data->pgfault = ev[PGFAULT];
+ mem_data->pgmajfault = ev[PGMAJFAULT];
si_meminfo(&val);
mem_data->sharedram = val.sharedram;
mem_data->totalhigh = P2K(val.totalhigh);
mem_data->freehigh = P2K(val.freehigh);
mem_data->bufferram = P2K(val.bufferram);
- mem_data->cached = P2K(atomic_read(&nr_pagecache) - val.bufferram);
+ mem_data->cached = P2K(global_page_state(NR_FILE_PAGES)
+ - val.bufferram);
si_swapinfo(&val);
mem_data->totalswap = P2K(val.totalswap);
- #include <linux/config.h>
+/* in case the preprocessor is a 32bit one */
+#undef i386
#ifdef CONFIG_LD_SCRIPT_STATIC
#include "uml.lds.S"
#else
#include <linux/linkage.h>
#include <linux/sys.h>
#include <linux/cache.h>
- #include <linux/config.h>
#define __NO_STUBS
/*#define sys_set_thread_area sys_ni_syscall
#define sys_get_thread_area sys_ni_syscall*/
-/* For __NR_time. The x86-64 name hopefully will change from sys_time64 to
- * sys_time (since the current situation is bogus). I've sent a patch to cleanup
- * this. Remove below the obsoleted line. */
-#define sys_time64 um_time
-#define sys_time um_time
-
/* On UML we call it this way ("old" means it's not mmap2) */
#define sys_mmap old_mmap
/* On x86-64 sys_uname is actually sys_newuname plus a compatibility trick.
/*
* This handles all read/write requests to block devices
*/
- #include <linux/config.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/backing-dev.h>
BIO_BUG_ON(!bio->bi_io_vec);
bio->bi_rw |= rw;
if (rw & WRITE)
- mod_page_state(pgpgout, count);
+ count_vm_events(PGPGOUT, count);
else
- mod_page_state(pgpgin, count);
+ count_vm_events(PGPGIN, count);
if (unlikely(block_dump)) {
char b[BDEVNAME_SIZE];
*
*/
- #include <linux/config.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/slab.h>
#endif
}
+
extern int acpi_in_resume;
void *acpi_os_allocate(acpi_size size)
{
{
struct acpi_os_dpc *dpc = NULL;
- ACPI_FUNCTION_TRACE("os_execute_deferred");
dpc = (struct acpi_os_dpc *)context;
if (!dpc) {
- ACPI_DEBUG_PRINT((ACPI_DB_ERROR, "Invalid (NULL) context.\n"));
- return_VOID;
+ printk(KERN_ERR PREFIX "Invalid (NULL) context\n");
+ return;
}
dpc->function(dpc->context);
kfree(dpc);
- return_VOID;
+ return;
}
static int acpi_os_execute_thread(void *context)
/*
* Allocate the memory for a spinlock and initialize it.
*/
-acpi_status acpi_os_create_lock(acpi_handle * out_handle)
+acpi_status acpi_os_create_lock(acpi_spinlock * handle)
{
- spinlock_t *lock_ptr;
-
- ACPI_FUNCTION_TRACE("os_create_lock");
-
- lock_ptr = acpi_os_allocate(sizeof(spinlock_t));
-
- spin_lock_init(lock_ptr);
-
- ACPI_DEBUG_PRINT((ACPI_DB_MUTEX, "Creating spinlock[%p].\n", lock_ptr));
+ spin_lock_init(*handle);
- *out_handle = lock_ptr;
-
- return_ACPI_STATUS(AE_OK);
+ return AE_OK;
}
/*
* Deallocate the memory for a spinlock.
*/
-void acpi_os_delete_lock(acpi_handle handle)
+void acpi_os_delete_lock(acpi_spinlock handle)
{
- ACPI_FUNCTION_TRACE("os_create_lock");
-
- ACPI_DEBUG_PRINT((ACPI_DB_MUTEX, "Deleting spinlock[%p].\n", handle));
-
- acpi_os_free(handle);
-
- return_VOID;
+ return;
}
acpi_status
{
struct semaphore *sem = NULL;
- ACPI_FUNCTION_TRACE("os_create_semaphore");
sem = acpi_os_allocate(sizeof(struct semaphore));
if (!sem)
- return_ACPI_STATUS(AE_NO_MEMORY);
+ return AE_NO_MEMORY;
memset(sem, 0, sizeof(struct semaphore));
sema_init(sem, initial_units);
ACPI_DEBUG_PRINT((ACPI_DB_MUTEX, "Creating semaphore[%p|%d].\n",
*handle, initial_units));
- return_ACPI_STATUS(AE_OK);
+ return AE_OK;
}
EXPORT_SYMBOL(acpi_os_create_semaphore);
{
struct semaphore *sem = (struct semaphore *)handle;
- ACPI_FUNCTION_TRACE("os_delete_semaphore");
if (!sem)
- return_ACPI_STATUS(AE_BAD_PARAMETER);
+ return AE_BAD_PARAMETER;
ACPI_DEBUG_PRINT((ACPI_DB_MUTEX, "Deleting semaphore[%p].\n", handle));
acpi_os_free(sem);
sem = NULL;
- return_ACPI_STATUS(AE_OK);
+ return AE_OK;
}
EXPORT_SYMBOL(acpi_os_delete_semaphore);
struct semaphore *sem = (struct semaphore *)handle;
int ret = 0;
- ACPI_FUNCTION_TRACE("os_wait_semaphore");
if (!sem || (units < 1))
- return_ACPI_STATUS(AE_BAD_PARAMETER);
+ return AE_BAD_PARAMETER;
if (units > 1)
- return_ACPI_STATUS(AE_SUPPORT);
+ return AE_SUPPORT;
ACPI_DEBUG_PRINT((ACPI_DB_MUTEX, "Waiting for semaphore[%p|%d|%d]\n",
handle, units, timeout));
}
if (ACPI_FAILURE(status)) {
- ACPI_DEBUG_PRINT((ACPI_DB_ERROR,
- "Failed to acquire semaphore[%p|%d|%d], %s\n",
+ ACPI_DEBUG_PRINT((ACPI_DB_MUTEX,
+ "Failed to acquire semaphore[%p|%d|%d], %s",
handle, units, timeout,
acpi_format_exception(status)));
} else {
ACPI_DEBUG_PRINT((ACPI_DB_MUTEX,
- "Acquired semaphore[%p|%d|%d]\n", handle,
+ "Acquired semaphore[%p|%d|%d]", handle,
units, timeout));
}
- return_ACPI_STATUS(status);
+ return status;
}
EXPORT_SYMBOL(acpi_os_wait_semaphore);
{
struct semaphore *sem = (struct semaphore *)handle;
- ACPI_FUNCTION_TRACE("os_signal_semaphore");
if (!sem || (units < 1))
- return_ACPI_STATUS(AE_BAD_PARAMETER);
+ return AE_BAD_PARAMETER;
if (units > 1)
- return_ACPI_STATUS(AE_SUPPORT);
+ return AE_SUPPORT;
ACPI_DEBUG_PRINT((ACPI_DB_MUTEX, "Signaling semaphore[%p|%d]\n", handle,
units));
up(sem);
- return_ACPI_STATUS(AE_OK);
+ return AE_OK;
}
EXPORT_SYMBOL(acpi_os_signal_semaphore);
* handle is a pointer to the spinlock_t.
*/
-acpi_cpu_flags acpi_os_acquire_lock(acpi_handle handle)
+acpi_cpu_flags acpi_os_acquire_lock(acpi_spinlock lockp)
{
acpi_cpu_flags flags;
- spin_lock_irqsave((spinlock_t *) handle, flags);
+ spin_lock_irqsave(lockp, flags);
return flags;
}
* Release a spinlock. See above.
*/
-void acpi_os_release_lock(acpi_handle handle, acpi_cpu_flags flags)
+void acpi_os_release_lock(acpi_spinlock lockp, acpi_cpu_flags flags)
{
- spin_unlock_irqrestore((spinlock_t *) handle, flags);
+ spin_unlock_irqrestore(lockp, flags);
}
#ifndef ACPI_USE_LOCAL_CACHE
* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
*/
- #include <linux/config.h>
#include <linux/kernel.h>
#include <linux/module.h>
struct list_head *node = NULL;
struct acpi_prt_entry *entry = NULL;
- ACPI_FUNCTION_TRACE("acpi_pci_irq_find_prt_entry");
if (!acpi_prt.count)
- return_PTR(NULL);
+ return NULL;
/*
* Parse through all PRT entries looking for a match on the specified
&& (device == entry->id.device)
&& (pin == entry->pin)) {
spin_unlock(&acpi_prt_lock);
- return_PTR(entry);
+ return entry;
}
}
spin_unlock(&acpi_prt_lock);
- return_PTR(NULL);
+ return NULL;
}
static int
{
struct acpi_prt_entry *entry = NULL;
- ACPI_FUNCTION_TRACE("acpi_pci_irq_add_entry");
if (!prt)
- return_VALUE(-EINVAL);
+ return -EINVAL;
entry = kmalloc(sizeof(struct acpi_prt_entry), GFP_KERNEL);
if (!entry)
- return_VALUE(-ENOMEM);
+ return -ENOMEM;
memset(entry, 0, sizeof(struct acpi_prt_entry));
entry->id.segment = segment;
acpi_prt.count++;
spin_unlock(&acpi_prt_lock);
- return_VALUE(0);
+ return 0;
}
static void
struct acpi_pci_routing_table *entry = NULL;
static int first_time = 1;
- ACPI_FUNCTION_TRACE("acpi_pci_irq_add_prt");
pathname = (char *)kmalloc(ACPI_PATHNAME_MAX, GFP_KERNEL);
if (!pathname)
- return_VALUE(-ENOMEM);
+ return -ENOMEM;
memset(pathname, 0, ACPI_PATHNAME_MAX);
if (first_time) {
kfree(pathname);
status = acpi_get_irq_routing_table(handle, &buffer);
if (status != AE_BUFFER_OVERFLOW) {
- ACPI_DEBUG_PRINT((ACPI_DB_ERROR, "Error evaluating _PRT [%s]\n",
- acpi_format_exception(status)));
- return_VALUE(-ENODEV);
+ ACPI_EXCEPTION((AE_INFO, status, "Evaluating _PRT [%s]",
+ acpi_format_exception(status)));
+ return -ENODEV;
}
prt = kmalloc(buffer.length, GFP_KERNEL);
if (!prt) {
- return_VALUE(-ENOMEM);
+ return -ENOMEM;
}
memset(prt, 0, buffer.length);
buffer.pointer = prt;
status = acpi_get_irq_routing_table(handle, &buffer);
if (ACPI_FAILURE(status)) {
- ACPI_DEBUG_PRINT((ACPI_DB_ERROR, "Error evaluating _PRT [%s]\n",
- acpi_format_exception(status)));
+ ACPI_EXCEPTION((AE_INFO, status, "Evaluating _PRT [%s]",
+ acpi_format_exception(status)));
kfree(buffer.pointer);
- return_VALUE(-ENODEV);
+ return -ENODEV;
}
entry = prt;
kfree(prt);
- return_VALUE(0);
+ return 0;
}
void acpi_pci_irq_del_prt(int segment, int bus)
{
int irq;
- ACPI_FUNCTION_TRACE("acpi_pci_allocate_irq");
if (entry->link.handle) {
irq = acpi_pci_link_allocate_irq(entry->link.handle,
entry->link.index, triggering,
polarity, link);
if (irq < 0) {
- ACPI_DEBUG_PRINT((ACPI_DB_WARN,
- "Invalid IRQ link routing entry\n"));
- return_VALUE(-1);
+ printk(KERN_WARNING PREFIX
+ "Invalid IRQ link routing entry\n");
+ return -1;
}
} else {
irq = entry->link.index;
}
ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found IRQ %d\n", irq));
- return_VALUE(irq);
+ return irq;
}
static int
{
int irq;
- ACPI_FUNCTION_TRACE("acpi_pci_free_irq");
if (entry->link.handle) {
irq = acpi_pci_link_free_irq(entry->link.handle);
} else {
irq = entry->link.index;
}
- return_VALUE(irq);
+ return irq;
}
/*
int bus_nr = bus->number;
int ret;
- ACPI_FUNCTION_TRACE("acpi_pci_irq_lookup");
ACPI_DEBUG_PRINT((ACPI_DB_INFO,
"Searching for PRT entry for %02x:%02x:%02x[%c]\n",
entry = acpi_pci_irq_find_prt_entry(segment, bus_nr, device, pin);
if (!entry) {
ACPI_DEBUG_PRINT((ACPI_DB_INFO, "PRT entry not found\n"));
- return_VALUE(-1);
+ return -1;
}
ret = func(entry, triggering, polarity, link);
- return_VALUE(ret);
+ return ret;
}
/*
int irq = -1;
u8 bridge_pin = 0;
- ACPI_FUNCTION_TRACE("acpi_pci_irq_derive");
if (!dev)
- return_VALUE(-EINVAL);
+ return -EINVAL;
/*
* Attempt to derive an IRQ for this device from a parent bridge's
ACPI_DEBUG_PRINT((ACPI_DB_INFO,
"No interrupt pin configured for device %s\n",
pci_name(bridge)));
- return_VALUE(-1);
+ return -1;
}
/* Pin is from 0 to 3 */
bridge_pin--;
}
if (irq < 0) {
- ACPI_DEBUG_PRINT((ACPI_DB_WARN,
- "Unable to derive IRQ for device %s\n",
- pci_name(dev)));
- return_VALUE(-1);
+ printk(KERN_WARNING PREFIX "Unable to derive IRQ for device %s\n",
+ pci_name(dev));
+ return -1;
}
ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Derive IRQ %d for device %s from %s\n",
irq, pci_name(dev), pci_name(bridge)));
- return_VALUE(irq);
+ return irq;
}
/*
char *link = NULL;
int rc;
- ACPI_FUNCTION_TRACE("acpi_pci_irq_enable");
if (!dev)
- return_VALUE(-EINVAL);
+ return -EINVAL;
pin = dev->pin;
if (!pin) {
ACPI_DEBUG_PRINT((ACPI_DB_INFO,
"No interrupt pin configured for device %s\n",
pci_name(dev)));
- return_VALUE(0);
+ return 0;
}
pin--;
if (!dev->bus) {
- ACPI_DEBUG_PRINT((ACPI_DB_ERROR,
- "Invalid (NULL) 'bus' field\n"));
- return_VALUE(-ENODEV);
+ printk(KERN_ERR PREFIX "Invalid (NULL) 'bus' field\n");
+ return -ENODEV;
}
/*
printk(" - using IRQ %d\n", dev->irq);
acpi_register_gsi(dev->irq, ACPI_LEVEL_SENSITIVE,
ACPI_ACTIVE_LOW);
- return_VALUE(0);
+ return 0;
} else {
printk("\n");
- return_VALUE(0);
+ return 0;
}
}
if (rc < 0) {
printk(KERN_WARNING PREFIX "PCI Interrupt %s[%c]: failed "
"to register GSI\n", pci_name(dev), ('A' + pin));
- return_VALUE(rc);
+ return rc;
}
dev->irq = rc;
(triggering == ACPI_LEVEL_SENSITIVE) ? "level" : "edge",
(polarity == ACPI_ACTIVE_LOW) ? "low" : "high", dev->irq);
- return_VALUE(0);
+ return 0;
}
EXPORT_SYMBOL(acpi_pci_irq_enable);
int triggering = ACPI_LEVEL_SENSITIVE;
int polarity = ACPI_ACTIVE_LOW;
- ACPI_FUNCTION_TRACE("acpi_pci_irq_disable");
if (!dev || !dev->bus)
- return_VOID;
+ return;
pin = dev->pin;
if (!pin)
- return_VOID;
+ return;
pin--;
/*
&triggering, &polarity, NULL,
acpi_pci_free_irq);
if (gsi < 0)
- return_VOID;
+ return;
/*
* TBD: It might be worth clearing dev->irq by magic constant
acpi_unregister_gsi(gsi);
- return_VOID;
+ return;
}
/*****************************************************************************/
- #include <linux/config.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/interrupt.h>
/*****************************************************************************/
-#ifdef MODULE
/*
* Define some string labels for arguments passed from the module
* load line. These allow for easy board definitions, and easy
module_param_array(board3, charp, NULL, 0);
MODULE_PARM_DESC(board3, "Board 3 config -> name[,ioaddr[,memaddr]");
-#endif
-
/*
* Set up a default memory address table for EISA board probing.
* The default addresses are all bellow 1Mbyte, which has to be the
* Prototype all functions in this driver!
*/
-#ifdef MODULE
-static void stli_argbrds(void);
static int stli_parsebrd(stlconf_t *confp, char **argp);
-
-static unsigned long stli_atol(char *str);
-#endif
-
-int stli_init(void);
+static int stli_init(void);
static int stli_open(struct tty_struct *tty, struct file *filp);
static void stli_close(struct tty_struct *tty, struct file *filp);
static int stli_write(struct tty_struct *tty, const unsigned char *buf, int count);
static struct class *istallion_class;
-#ifdef MODULE
-
/*
* Loadable module initialization stuff.
*/
return(1);
}
-#endif
-
/*****************************************************************************/
static int stli_open(struct tty_struct *tty, struct file *filp)
/*****************************************************************************/
-int __init stli_init(void)
+static int __init stli_init(void)
{
int i;
printk(KERN_INFO "%s: version %s\n", stli_drvtitle, stli_drvversion);
*
*/
- #include <linux/config.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/slab.h>
#include "edac_mc.h"
+#define AMD76X_REVISION " Ver: 2.0.0 " __DATE__
+
+
#define amd76x_printk(level, fmt, arg...) \
edac_printk(level, "amd76x", fmt, ##arg)
static void amd76x_get_error_info(struct mem_ctl_info *mci,
struct amd76x_error_info *info)
{
- pci_read_config_dword(mci->pdev, AMD76X_ECC_MODE_STATUS,
+ struct pci_dev *pdev;
+
+ pdev = to_pci_dev(mci->dev);
+ pci_read_config_dword(pdev, AMD76X_ECC_MODE_STATUS,
&info->ecc_mode_status);
if (info->ecc_mode_status & BIT(8))
- pci_write_bits32(mci->pdev, AMD76X_ECC_MODE_STATUS,
+ pci_write_bits32(pdev, AMD76X_ECC_MODE_STATUS,
(u32) BIT(8), (u32) BIT(8));
if (info->ecc_mode_status & BIT(9))
- pci_write_bits32(mci->pdev, AMD76X_ECC_MODE_STATUS,
+ pci_write_bits32(pdev, AMD76X_ECC_MODE_STATUS,
(u32) BIT(9), (u32) BIT(9));
}
amd76x_process_error_info(mci, &info, 1);
}
+static void amd76x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,
+ enum edac_type edac_mode)
+{
+ struct csrow_info *csrow;
+ u32 mba, mba_base, mba_mask, dms;
+ int index;
+
+ for (index = 0; index < mci->nr_csrows; index++) {
+ csrow = &mci->csrows[index];
+
+ /* find the DRAM Chip Select Base address and mask */
+ pci_read_config_dword(pdev,
+ AMD76X_MEM_BASE_ADDR + (index * 4),
+ &mba);
+
+ if (!(mba & BIT(0)))
+ continue;
+
+ mba_base = mba & 0xff800000UL;
+ mba_mask = ((mba & 0xff80) << 16) | 0x7fffffUL;
+ pci_read_config_dword(pdev, AMD76X_DRAM_MODE_STATUS, &dms);
+ csrow->first_page = mba_base >> PAGE_SHIFT;
+ csrow->nr_pages = (mba_mask + 1) >> PAGE_SHIFT;
+ csrow->last_page = csrow->first_page + csrow->nr_pages - 1;
+ csrow->page_mask = mba_mask >> PAGE_SHIFT;
+ csrow->grain = csrow->nr_pages << PAGE_SHIFT;
+ csrow->mtype = MEM_RDDR;
+ csrow->dtype = ((dms >> index) & 0x1) ? DEV_X4 : DEV_UNKNOWN;
+ csrow->edac_mode = edac_mode;
+ }
+}
+
/**
* amd76x_probe1 - Perform set up for detected device
* @pdev; PCI device detected
*/
static int amd76x_probe1(struct pci_dev *pdev, int dev_idx)
{
- int rc = -ENODEV;
- int index;
- struct mem_ctl_info *mci = NULL;
- enum edac_type ems_modes[] = {
+ static const enum edac_type ems_modes[] = {
EDAC_NONE,
EDAC_EC,
EDAC_SECDED,
EDAC_SECDED
};
+ struct mem_ctl_info *mci = NULL;
u32 ems;
u32 ems_mode;
struct amd76x_error_info discard;
mci = edac_mc_alloc(0, AMD76X_NR_CSROWS, AMD76X_NR_CHANS);
if (mci == NULL) {
- rc = -ENOMEM;
- goto fail;
+ return -ENOMEM;
}
debugf0("%s(): mci = %p\n", __func__, mci);
- mci->pdev = pdev;
+ mci->dev = &pdev->dev;
mci->mtype_cap = MEM_FLAG_RDDR;
mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_EC | EDAC_FLAG_SECDED;
mci->edac_cap = ems_mode ?
(EDAC_FLAG_EC | EDAC_FLAG_SECDED) : EDAC_FLAG_NONE;
mci->mod_name = EDAC_MOD_STR;
- mci->mod_ver = "$Revision: 1.4.2.5 $";
+ mci->mod_ver = AMD76X_REVISION;
mci->ctl_name = amd76x_devs[dev_idx].ctl_name;
mci->edac_check = amd76x_check;
mci->ctl_page_to_phys = NULL;
- for (index = 0; index < mci->nr_csrows; index++) {
- struct csrow_info *csrow = &mci->csrows[index];
- u32 mba;
- u32 mba_base;
- u32 mba_mask;
- u32 dms;
-
- /* find the DRAM Chip Select Base address and mask */
- pci_read_config_dword(mci->pdev,
- AMD76X_MEM_BASE_ADDR + (index * 4), &mba);
-
- if (!(mba & BIT(0)))
- continue;
-
- mba_base = mba & 0xff800000UL;
- mba_mask = ((mba & 0xff80) << 16) | 0x7fffffUL;
- pci_read_config_dword(mci->pdev, AMD76X_DRAM_MODE_STATUS,
- &dms);
- csrow->first_page = mba_base >> PAGE_SHIFT;
- csrow->nr_pages = (mba_mask + 1) >> PAGE_SHIFT;
- csrow->last_page = csrow->first_page + csrow->nr_pages - 1;
- csrow->page_mask = mba_mask >> PAGE_SHIFT;
- csrow->grain = csrow->nr_pages << PAGE_SHIFT;
- csrow->mtype = MEM_RDDR;
- csrow->dtype = ((dms >> index) & 0x1) ? DEV_X4 : DEV_UNKNOWN;
- csrow->edac_mode = ems_modes[ems_mode];
- }
-
+ amd76x_init_csrows(mci, pdev, ems_modes[ems_mode]);
amd76x_get_error_info(mci, &discard); /* clear counters */
- if (edac_mc_add_mc(mci)) {
+ /* Here we assume that we will never see multiple instances of this
+ * type of memory controller. The ID is therefore hardcoded to 0.
+ */
+ if (edac_mc_add_mc(mci,0)) {
debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
goto fail;
}
return 0;
fail:
- if (mci != NULL)
- edac_mc_free(mci);
- return rc;
+ edac_mc_free(mci);
+ return -ENODEV;
}
/* returns count (>= 0), or negative on error */
debugf0("%s()\n", __func__);
- if ((mci = edac_mc_del_mc(pdev)) == NULL)
+ if ((mci = edac_mc_del_mc(&pdev->dev)) == NULL)
return;
edac_mc_free(mci);
*
*/
- #include <linux/config.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/slab.h>
#include "edac_mc.h"
+#define E752X_REVISION " Ver: 2.0.0 " __DATE__
+
static int force_function_unhide;
#define e752x_printk(level, fmt, arg...) \
e752x_process_error_info(mci, &info, 1);
}
-static int e752x_probe1(struct pci_dev *pdev, int dev_idx)
+/* Return 1 if dual channel mode is active. Else return 0. */
+static inline int dual_channel_active(u16 ddrcsr)
+{
+ return (((ddrcsr >> 12) & 3) == 3);
+}
+
+static void e752x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,
+ u16 ddrcsr)
+{
+ struct csrow_info *csrow;
+ unsigned long last_cumul_size;
+ int index, mem_dev, drc_chan;
+ int drc_drbg; /* DRB granularity 0=64mb, 1=128mb */
+ int drc_ddim; /* DRAM Data Integrity Mode 0=none, 2=edac */
+ u8 value;
+ u32 dra, drc, cumul_size;
+
+ pci_read_config_dword(pdev, E752X_DRA, &dra);
+ pci_read_config_dword(pdev, E752X_DRC, &drc);
+ drc_chan = dual_channel_active(ddrcsr);
+ drc_drbg = drc_chan + 1; /* 128 in dual mode, 64 in single */
+ drc_ddim = (drc >> 20) & 0x3;
+
+ /* The dram row boundary (DRB) reg values are boundary address for
+ * each DRAM row with a granularity of 64 or 128MB (single/dual
+ * channel operation). DRB regs are cumulative; therefore DRB7 will
+ * contain the total memory contained in all eight rows.
+ */
+ for (last_cumul_size = index = 0; index < mci->nr_csrows; index++) {
+ /* mem_dev 0=x8, 1=x4 */
+ mem_dev = (dra >> (index * 4 + 2)) & 0x3;
+ csrow = &mci->csrows[index];
+
+ mem_dev = (mem_dev == 2);
+ pci_read_config_byte(pdev, E752X_DRB + index, &value);
+ /* convert a 128 or 64 MiB DRB to a page size. */
+ cumul_size = value << (25 + drc_drbg - PAGE_SHIFT);
+ debugf3("%s(): (%d) cumul_size 0x%x\n", __func__, index,
+ cumul_size);
+ if (cumul_size == last_cumul_size)
+ continue; /* not populated */
+
+ csrow->first_page = last_cumul_size;
+ csrow->last_page = cumul_size - 1;
+ csrow->nr_pages = cumul_size - last_cumul_size;
+ last_cumul_size = cumul_size;
+ csrow->grain = 1 << 12; /* 4KiB - resolution of CELOG */
+ csrow->mtype = MEM_RDDR; /* only one type supported */
+ csrow->dtype = mem_dev ? DEV_X4 : DEV_X8;
+
+ /*
+ * if single channel or x8 devices then SECDED
+ * if dual channel and x4 then S4ECD4ED
+ */
+ if (drc_ddim) {
+ if (drc_chan && mem_dev) {
+ csrow->edac_mode = EDAC_S4ECD4ED;
+ mci->edac_cap |= EDAC_FLAG_S4ECD4ED;
+ } else {
+ csrow->edac_mode = EDAC_SECDED;
+ mci->edac_cap |= EDAC_FLAG_SECDED;
+ }
+ } else
+ csrow->edac_mode = EDAC_NONE;
+ }
+}
+
+static void e752x_init_mem_map_table(struct pci_dev *pdev,
+ struct e752x_pvt *pvt)
{
- int rc = -ENODEV;
int index;
+ u8 value, last, row, stat8;
+
+ last = 0;
+ row = 0;
+
+ for (index = 0; index < 8; index += 2) {
+ pci_read_config_byte(pdev, E752X_DRB + index, &value);
+ /* test if there is a dimm in this slot */
+ if (value == last) {
+ /* no dimm in the slot, so flag it as empty */
+ pvt->map[index] = 0xff;
+ pvt->map[index + 1] = 0xff;
+ } else { /* there is a dimm in the slot */
+ pvt->map[index] = row;
+ row++;
+ last = value;
+ /* test the next value to see if the dimm is double
+ * sided
+ */
+ pci_read_config_byte(pdev, E752X_DRB + index + 1,
+ &value);
+ pvt->map[index + 1] = (value == last) ?
+ 0xff : /* the dimm is single sided,
+ so flag as empty */
+ row; /* this is a double sided dimm
+ to save the next row # */
+ row++;
+ last = value;
+ }
+ }
+
+ /* set the map type. 1 = normal, 0 = reversed */
+ pci_read_config_byte(pdev, E752X_DRM, &stat8);
+ pvt->map_type = ((stat8 & 0x0f) > ((stat8 >> 4) & 0x0f));
+}
+
+/* Return 0 on success or 1 on failure. */
+static int e752x_get_devs(struct pci_dev *pdev, int dev_idx,
+ struct e752x_pvt *pvt)
+{
+ struct pci_dev *dev;
+
+ pvt->bridge_ck = pci_get_device(PCI_VENDOR_ID_INTEL,
+ pvt->dev_info->err_dev,
+ pvt->bridge_ck);
+
+ if (pvt->bridge_ck == NULL)
+ pvt->bridge_ck = pci_scan_single_device(pdev->bus,
+ PCI_DEVFN(0, 1));
+
+ if (pvt->bridge_ck == NULL) {
+ e752x_printk(KERN_ERR, "error reporting device not found:"
+ "vendor %x device 0x%x (broken BIOS?)\n",
+ PCI_VENDOR_ID_INTEL, e752x_devs[dev_idx].err_dev);
+ return 1;
+ }
+
+ dev = pci_get_device(PCI_VENDOR_ID_INTEL, e752x_devs[dev_idx].ctl_dev,
+ NULL);
+
+ if (dev == NULL)
+ goto fail;
+
+ pvt->dev_d0f0 = dev;
+ pvt->dev_d0f1 = pci_dev_get(pvt->bridge_ck);
+
+ return 0;
+
+fail:
+ pci_dev_put(pvt->bridge_ck);
+ return 1;
+}
+
+static void e752x_init_error_reporting_regs(struct e752x_pvt *pvt)
+{
+ struct pci_dev *dev;
+
+ dev = pvt->dev_d0f1;
+ /* Turn off error disable & SMI in case the BIOS turned it on */
+ pci_write_config_byte(dev, E752X_HI_ERRMASK, 0x00);
+ pci_write_config_byte(dev, E752X_HI_SMICMD, 0x00);
+ pci_write_config_word(dev, E752X_SYSBUS_ERRMASK, 0x00);
+ pci_write_config_word(dev, E752X_SYSBUS_SMICMD, 0x00);
+ pci_write_config_byte(dev, E752X_BUF_ERRMASK, 0x00);
+ pci_write_config_byte(dev, E752X_BUF_SMICMD, 0x00);
+ pci_write_config_byte(dev, E752X_DRAM_ERRMASK, 0x00);
+ pci_write_config_byte(dev, E752X_DRAM_SMICMD, 0x00);
+}
+
+static int e752x_probe1(struct pci_dev *pdev, int dev_idx)
+{
u16 pci_data;
u8 stat8;
- struct mem_ctl_info *mci = NULL;
- struct e752x_pvt *pvt = NULL;
+ struct mem_ctl_info *mci;
+ struct e752x_pvt *pvt;
u16 ddrcsr;
- u32 drc;
int drc_chan; /* Number of channels 0=1chan,1=2chan */
- int drc_drbg; /* DRB granularity 0=64mb, 1=128mb */
- int drc_ddim; /* DRAM Data Integrity Mode 0=none,2=edac */
- u32 dra;
- unsigned long last_cumul_size;
- struct pci_dev *dev = NULL;
struct e752x_error_info discard;
debugf0("%s(): mci\n", __func__);
if (!force_function_unhide && !(stat8 & (1 << 5))) {
printk(KERN_INFO "Contact your BIOS vendor to see if the "
"E752x error registers can be safely un-hidden\n");
- goto fail;
+ return -ENOMEM;
}
stat8 |= (1 << 5);
pci_write_config_byte(pdev, E752X_DEVPRES1, stat8);
- /* need to find out the number of channels */
- pci_read_config_dword(pdev, E752X_DRC, &drc);
pci_read_config_word(pdev, E752X_DDRCSR, &ddrcsr);
/* FIXME: should check >>12 or 0xf, true for all? */
/* Dual channel = 1, Single channel = 0 */
- drc_chan = (((ddrcsr >> 12) & 3) == 3);
- drc_drbg = drc_chan + 1; /* 128 in dual mode, 64 in single */
- drc_ddim = (drc >> 20) & 0x3;
+ drc_chan = dual_channel_active(ddrcsr);
mci = edac_mc_alloc(sizeof(*pvt), E752X_NR_CSROWS, drc_chan + 1);
if (mci == NULL) {
- rc = -ENOMEM;
- goto fail;
+ return -ENOMEM;
}
debugf3("%s(): init mci\n", __func__);
EDAC_FLAG_S4ECD4ED;
/* FIXME - what if different memory types are in different csrows? */
mci->mod_name = EDAC_MOD_STR;
- mci->mod_ver = "$Revision: 1.5.2.11 $";
- mci->pdev = pdev;
+ mci->mod_ver = E752X_REVISION;
+ mci->dev = &pdev->dev;
debugf3("%s(): init pvt\n", __func__);
pvt = (struct e752x_pvt *) mci->pvt_info;
pvt->dev_info = &e752x_devs[dev_idx];
- pvt->bridge_ck = pci_get_device(PCI_VENDOR_ID_INTEL,
- pvt->dev_info->err_dev,
- pvt->bridge_ck);
-
- if (pvt->bridge_ck == NULL)
- pvt->bridge_ck = pci_scan_single_device(pdev->bus,
- PCI_DEVFN(0, 1));
+ pvt->mc_symmetric = ((ddrcsr & 0x10) != 0);
- if (pvt->bridge_ck == NULL) {
- e752x_printk(KERN_ERR, "error reporting device not found:"
- "vendor %x device 0x%x (broken BIOS?)\n",
- PCI_VENDOR_ID_INTEL, e752x_devs[dev_idx].err_dev);
- goto fail;
+ if (e752x_get_devs(pdev, dev_idx, pvt)) {
+ edac_mc_free(mci);
+ return -ENODEV;
}
- pvt->mc_symmetric = ((ddrcsr & 0x10) != 0);
debugf3("%s(): more mci init\n", __func__);
mci->ctl_name = pvt->dev_info->ctl_name;
mci->edac_check = e752x_check;
mci->ctl_page_to_phys = ctl_page_to_phys;
- /* find out the device types */
- pci_read_config_dword(pdev, E752X_DRA, &dra);
-
- /*
- * The dram row boundary (DRB) reg values are boundary address for
- * each DRAM row with a granularity of 64 or 128MB (single/dual
- * channel operation). DRB regs are cumulative; therefore DRB7 will
- * contain the total memory contained in all eight rows.
- */
- for (last_cumul_size = index = 0; index < mci->nr_csrows; index++) {
- u8 value;
- u32 cumul_size;
-
- /* mem_dev 0=x8, 1=x4 */
- int mem_dev = (dra >> (index * 4 + 2)) & 0x3;
- struct csrow_info *csrow = &mci->csrows[index];
-
- mem_dev = (mem_dev == 2);
- pci_read_config_byte(mci->pdev, E752X_DRB + index, &value);
- /* convert a 128 or 64 MiB DRB to a page size. */
- cumul_size = value << (25 + drc_drbg - PAGE_SHIFT);
- debugf3("%s(): (%d) cumul_size 0x%x\n", __func__, index,
- cumul_size);
-
- if (cumul_size == last_cumul_size)
- continue; /* not populated */
-
- csrow->first_page = last_cumul_size;
- csrow->last_page = cumul_size - 1;
- csrow->nr_pages = cumul_size - last_cumul_size;
- last_cumul_size = cumul_size;
- csrow->grain = 1 << 12; /* 4KiB - resolution of CELOG */
- csrow->mtype = MEM_RDDR; /* only one type supported */
- csrow->dtype = mem_dev ? DEV_X4 : DEV_X8;
-
- /*
- * if single channel or x8 devices then SECDED
- * if dual channel and x4 then S4ECD4ED
- */
- if (drc_ddim) {
- if (drc_chan && mem_dev) {
- csrow->edac_mode = EDAC_S4ECD4ED;
- mci->edac_cap |= EDAC_FLAG_S4ECD4ED;
- } else {
- csrow->edac_mode = EDAC_SECDED;
- mci->edac_cap |= EDAC_FLAG_SECDED;
- }
- } else
- csrow->edac_mode = EDAC_NONE;
- }
-
- /* Fill in the memory map table */
- {
- u8 value;
- u8 last = 0;
- u8 row = 0;
-
- for (index = 0; index < 8; index += 2) {
- pci_read_config_byte(mci->pdev, E752X_DRB + index,
- &value);
-
- /* test if there is a dimm in this slot */
- if (value == last) {
- /* no dimm in the slot, so flag it as empty */
- pvt->map[index] = 0xff;
- pvt->map[index + 1] = 0xff;
- } else { /* there is a dimm in the slot */
- pvt->map[index] = row;
- row++;
- last = value;
- /* test the next value to see if the dimm is
- double sided */
- pci_read_config_byte(mci->pdev,
- E752X_DRB + index + 1,
- &value);
- pvt->map[index + 1] = (value == last) ?
- 0xff : /* the dimm is single sided,
- * so flag as empty
- */
- row; /* this is a double sided dimm
- * to save the next row #
- */
- row++;
- last = value;
- }
- }
- }
+ e752x_init_csrows(mci, pdev, ddrcsr);
+ e752x_init_mem_map_table(pdev, pvt);
/* set the map type. 1 = normal, 0 = reversed */
- pci_read_config_byte(mci->pdev, E752X_DRM, &stat8);
+ pci_read_config_byte(pdev, E752X_DRM, &stat8);
pvt->map_type = ((stat8 & 0x0f) > ((stat8 >> 4) & 0x0f));
mci->edac_cap |= EDAC_FLAG_NONE;
debugf3("%s(): tolm, remapbase, remaplimit\n", __func__);
/* load the top of low memory, remap base, and remap limit vars */
- pci_read_config_word(mci->pdev, E752X_TOLM, &pci_data);
+ pci_read_config_word(pdev, E752X_TOLM, &pci_data);
pvt->tolm = ((u32) pci_data) << 4;
- pci_read_config_word(mci->pdev, E752X_REMAPBASE, &pci_data);
+ pci_read_config_word(pdev, E752X_REMAPBASE, &pci_data);
pvt->remapbase = ((u32) pci_data) << 14;
- pci_read_config_word(mci->pdev, E752X_REMAPLIMIT, &pci_data);
+ pci_read_config_word(pdev, E752X_REMAPLIMIT, &pci_data);
pvt->remaplimit = ((u32) pci_data) << 14;
e752x_printk(KERN_INFO,
"tolm = %x, remapbase = %x, remaplimit = %x\n", pvt->tolm,
pvt->remapbase, pvt->remaplimit);
- if (edac_mc_add_mc(mci)) {
+ /* Here we assume that we will never see multiple instances of this
+ * type of memory controller. The ID is therefore hardcoded to 0.
+ */
+ if (edac_mc_add_mc(mci,0)) {
debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
goto fail;
}
- dev = pci_get_device(PCI_VENDOR_ID_INTEL, e752x_devs[dev_idx].ctl_dev,
- NULL);
- pvt->dev_d0f0 = dev;
- /* find the error reporting device and clear errors */
- dev = pvt->dev_d0f1 = pci_dev_get(pvt->bridge_ck);
- /* Turn off error disable & SMI in case the BIOS turned it on */
- pci_write_config_byte(dev, E752X_HI_ERRMASK, 0x00);
- pci_write_config_byte(dev, E752X_HI_SMICMD, 0x00);
- pci_write_config_word(dev, E752X_SYSBUS_ERRMASK, 0x00);
- pci_write_config_word(dev, E752X_SYSBUS_SMICMD, 0x00);
- pci_write_config_byte(dev, E752X_BUF_ERRMASK, 0x00);
- pci_write_config_byte(dev, E752X_BUF_SMICMD, 0x00);
- pci_write_config_byte(dev, E752X_DRAM_ERRMASK, 0x00);
- pci_write_config_byte(dev, E752X_DRAM_SMICMD, 0x00);
-
+ e752x_init_error_reporting_regs(pvt);
e752x_get_error_info(mci, &discard); /* clear other MCH errors */
/* get this far and it's successful */
return 0;
fail:
- if (mci) {
- if (pvt->dev_d0f0)
- pci_dev_put(pvt->dev_d0f0);
-
- if (pvt->dev_d0f1)
- pci_dev_put(pvt->dev_d0f1);
-
- if (pvt->bridge_ck)
- pci_dev_put(pvt->bridge_ck);
-
- edac_mc_free(mci);
- }
+ pci_dev_put(pvt->dev_d0f0);
+ pci_dev_put(pvt->dev_d0f1);
+ pci_dev_put(pvt->bridge_ck);
+ edac_mc_free(mci);
- return rc;
+ return -ENODEV;
}
/* returns count (>= 0), or negative on error */
debugf0("%s()\n", __func__);
- if ((mci = edac_mc_del_mc(pdev)) == NULL)
+ if ((mci = edac_mc_del_mc(&pdev->dev)) == NULL)
return;
pvt = (struct e752x_pvt *) mci->pvt_info;
*
*/
- #include <linux/config.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/slab.h>
#include "edac_mc.h"
+#define E7XXX_REVISION " Ver: 2.0.0 " __DATE__
+
#define e7xxx_printk(level, fmt, arg...) \
edac_printk(level, "e7xxx", fmt, ##arg)
e7xxx_process_error_info(mci, &info, 1);
}
-static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx)
+/* Return 1 if dual channel mode is active. Else return 0. */
+static inline int dual_channel_active(u32 drc, int dev_idx)
{
- int rc = -ENODEV;
- int index;
- u16 pci_data;
- struct mem_ctl_info *mci = NULL;
- struct e7xxx_pvt *pvt = NULL;
- u32 drc;
- int drc_chan = 1; /* Number of channels 0=1chan,1=2chan */
- int drc_drbg = 1; /* DRB granularity 0=32mb,1=64mb */
- int drc_ddim; /* DRAM Data Integrity Mode 0=none,2=edac */
- u32 dra;
- unsigned long last_cumul_size;
- struct e7xxx_error_info discard;
-
- debugf0("%s(): mci\n", __func__);
+ return (dev_idx == E7501) ? ((drc >> 22) & 0x1) : 1;
+}
- /* need to find out the number of channels */
- pci_read_config_dword(pdev, E7XXX_DRC, &drc);
+/* Return DRB granularity (0=32mb, 1=64mb). */
+static inline int drb_granularity(u32 drc, int dev_idx)
+{
/* only e7501 can be single channel */
- if (dev_idx == E7501) {
- drc_chan = ((drc >> 22) & 0x1);
- drc_drbg = (drc >> 18) & 0x3;
- }
-
- drc_ddim = (drc >> 20) & 0x3;
- mci = edac_mc_alloc(sizeof(*pvt), E7XXX_NR_CSROWS, drc_chan + 1);
-
- if (mci == NULL) {
- rc = -ENOMEM;
- goto fail;
- }
-
- debugf3("%s(): init mci\n", __func__);
- mci->mtype_cap = MEM_FLAG_RDDR;
- mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED |
- EDAC_FLAG_S4ECD4ED;
- /* FIXME - what if different memory types are in different csrows? */
- mci->mod_name = EDAC_MOD_STR;
- mci->mod_ver = "$Revision: 1.5.2.9 $";
- mci->pdev = pdev;
+ return (dev_idx == E7501) ? ((drc >> 18) & 0x3) : 1;
+}
- debugf3("%s(): init pvt\n", __func__);
- pvt = (struct e7xxx_pvt *) mci->pvt_info;
- pvt->dev_info = &e7xxx_devs[dev_idx];
- pvt->bridge_ck = pci_get_device(PCI_VENDOR_ID_INTEL,
- pvt->dev_info->err_dev,
- pvt->bridge_ck);
- if (!pvt->bridge_ck) {
- e7xxx_printk(KERN_ERR, "error reporting device not found:"
- "vendor %x device 0x%x (broken BIOS?)\n",
- PCI_VENDOR_ID_INTEL, e7xxx_devs[dev_idx].err_dev);
- goto fail;
- }
-
- debugf3("%s(): more mci init\n", __func__);
- mci->ctl_name = pvt->dev_info->ctl_name;
- mci->edac_check = e7xxx_check;
- mci->ctl_page_to_phys = ctl_page_to_phys;
+static void e7xxx_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,
+ int dev_idx, u32 drc)
+{
+ unsigned long last_cumul_size;
+ int index;
+ u8 value;
+ u32 dra, cumul_size;
+ int drc_chan, drc_drbg, drc_ddim, mem_dev;
+ struct csrow_info *csrow;
- /* find out the device types */
pci_read_config_dword(pdev, E7XXX_DRA, &dra);
+ drc_chan = dual_channel_active(drc, dev_idx);
+ drc_drbg = drb_granularity(drc, dev_idx);
+ drc_ddim = (drc >> 20) & 0x3;
+ last_cumul_size = 0;
- /*
- * The dram row boundary (DRB) reg values are boundary address
+ /* The dram row boundary (DRB) reg values are boundary address
* for each DRAM row with a granularity of 32 or 64MB (single/dual
* channel operation). DRB regs are cumulative; therefore DRB7 will
* contain the total memory contained in all eight rows.
*/
- for (last_cumul_size = index = 0; index < mci->nr_csrows; index++) {
- u8 value;
- u32 cumul_size;
+ for (index = 0; index < mci->nr_csrows; index++) {
/* mem_dev 0=x8, 1=x4 */
- int mem_dev = (dra >> (index * 4 + 3)) & 0x1;
- struct csrow_info *csrow = &mci->csrows[index];
+ mem_dev = (dra >> (index * 4 + 3)) & 0x1;
+ csrow = &mci->csrows[index];
- pci_read_config_byte(mci->pdev, E7XXX_DRB + index, &value);
+ pci_read_config_byte(pdev, E7XXX_DRB + index, &value);
/* convert a 64 or 32 MiB DRB to a page size. */
cumul_size = value << (25 + drc_drbg - PAGE_SHIFT);
debugf3("%s(): (%d) cumul_size 0x%x\n", __func__, index,
cumul_size);
-
if (cumul_size == last_cumul_size)
- continue; /* not populated */
+ continue; /* not populated */
csrow->first_page = last_cumul_size;
csrow->last_page = cumul_size - 1;
csrow->nr_pages = cumul_size - last_cumul_size;
last_cumul_size = cumul_size;
- csrow->grain = 1 << 12; /* 4KiB - resolution of CELOG */
- csrow->mtype = MEM_RDDR; /* only one type supported */
+ csrow->grain = 1 << 12; /* 4KiB - resolution of CELOG */
+ csrow->mtype = MEM_RDDR; /* only one type supported */
csrow->dtype = mem_dev ? DEV_X4 : DEV_X8;
/*
} else
csrow->edac_mode = EDAC_NONE;
}
+}
- mci->edac_cap |= EDAC_FLAG_NONE;
+static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx)
+{
+ u16 pci_data;
+ struct mem_ctl_info *mci = NULL;
+ struct e7xxx_pvt *pvt = NULL;
+ u32 drc;
+ int drc_chan;
+ struct e7xxx_error_info discard;
+
+ debugf0("%s(): mci\n", __func__);
+ pci_read_config_dword(pdev, E7XXX_DRC, &drc);
+
+ drc_chan = dual_channel_active(drc, dev_idx);
+ mci = edac_mc_alloc(sizeof(*pvt), E7XXX_NR_CSROWS, drc_chan + 1);
+
+ if (mci == NULL)
+ return -ENOMEM;
+
+ debugf3("%s(): init mci\n", __func__);
+ mci->mtype_cap = MEM_FLAG_RDDR;
+ mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED |
+ EDAC_FLAG_S4ECD4ED;
+ /* FIXME - what if different memory types are in different csrows? */
+ mci->mod_name = EDAC_MOD_STR;
+ mci->mod_ver = E7XXX_REVISION;
+ mci->dev = &pdev->dev;
+ debugf3("%s(): init pvt\n", __func__);
+ pvt = (struct e7xxx_pvt *) mci->pvt_info;
+ pvt->dev_info = &e7xxx_devs[dev_idx];
+ pvt->bridge_ck = pci_get_device(PCI_VENDOR_ID_INTEL,
+ pvt->dev_info->err_dev,
+ pvt->bridge_ck);
+ if (!pvt->bridge_ck) {
+ e7xxx_printk(KERN_ERR, "error reporting device not found:"
+ "vendor %x device 0x%x (broken BIOS?)\n",
+ PCI_VENDOR_ID_INTEL, e7xxx_devs[dev_idx].err_dev);
+ goto fail0;
+ }
+
+ debugf3("%s(): more mci init\n", __func__);
+ mci->ctl_name = pvt->dev_info->ctl_name;
+ mci->edac_check = e7xxx_check;
+ mci->ctl_page_to_phys = ctl_page_to_phys;
+ e7xxx_init_csrows(mci, pdev, dev_idx, drc);
+ mci->edac_cap |= EDAC_FLAG_NONE;
debugf3("%s(): tolm, remapbase, remaplimit\n", __func__);
/* load the top of low memory, remap base, and remap limit vars */
- pci_read_config_word(mci->pdev, E7XXX_TOLM, &pci_data);
+ pci_read_config_word(pdev, E7XXX_TOLM, &pci_data);
pvt->tolm = ((u32) pci_data) << 4;
- pci_read_config_word(mci->pdev, E7XXX_REMAPBASE, &pci_data);
+ pci_read_config_word(pdev, E7XXX_REMAPBASE, &pci_data);
pvt->remapbase = ((u32) pci_data) << 14;
- pci_read_config_word(mci->pdev, E7XXX_REMAPLIMIT, &pci_data);
+ pci_read_config_word(pdev, E7XXX_REMAPLIMIT, &pci_data);
pvt->remaplimit = ((u32) pci_data) << 14;
e7xxx_printk(KERN_INFO,
"tolm = %x, remapbase = %x, remaplimit = %x\n", pvt->tolm,
/* clear any pending errors, or initial state bits */
e7xxx_get_error_info(mci, &discard);
- if (edac_mc_add_mc(mci) != 0) {
+ /* Here we assume that we will never see multiple instances of this
+ * type of memory controller. The ID is therefore hardcoded to 0.
+ */
+ if (edac_mc_add_mc(mci,0)) {
debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
- goto fail;
+ goto fail1;
}
/* get this far and it's successful */
debugf3("%s(): success\n", __func__);
return 0;
-fail:
- if (mci != NULL) {
- if(pvt != NULL && pvt->bridge_ck)
- pci_dev_put(pvt->bridge_ck);
- edac_mc_free(mci);
- }
+fail1:
+ pci_dev_put(pvt->bridge_ck);
+
+fail0:
+ edac_mc_free(mci);
- return rc;
+ return -ENODEV;
}
/* returns count (>= 0), or negative on error */
debugf0("%s()\n", __func__);
- if ((mci = edac_mc_del_mc(pdev)) == NULL)
+ if ((mci = edac_mc_del_mc(&pdev->dev)) == NULL)
return;
pvt = (struct e7xxx_pvt *) mci->pvt_info;
*
*/
- #include <linux/config.h>
#include <linux/module.h>
#include <linux/proc_fs.h>
#include <linux/kernel.h>
static int panic_on_ue;
static int poll_msec = 1000;
-static int check_pci_parity = 0; /* default YES check PCI parity */
-static int panic_on_pci_parity; /* default no panic on PCI Parity */
-static atomic_t pci_parity_count = ATOMIC_INIT(0);
-
/* lock to memory controller's control array */
static DECLARE_MUTEX(mem_ctls_mutex);
static struct list_head mc_devices = LIST_HEAD_INIT(mc_devices);
static struct task_struct *edac_thread;
+#ifdef CONFIG_PCI
+static int check_pci_parity = 0; /* default YES check PCI parity */
+static int panic_on_pci_parity; /* default no panic on PCI Parity */
+static atomic_t pci_parity_count = ATOMIC_INIT(0);
+
/* Structure of the whitelist and blacklist arrays */
struct edac_pci_device_list {
unsigned int vendor; /* Vendor ID */
static struct edac_pci_device_list pci_whitelist[MAX_LISTED_PCI_DEVICES];
static int pci_whitelist_count ;
+#ifndef DISABLE_EDAC_SYSFS
+static struct kobject edac_pci_kobj; /* /sys/devices/system/edac/pci */
+static struct completion edac_pci_kobj_complete;
+#endif /* DISABLE_EDAC_SYSFS */
+#endif /* CONFIG_PCI */
+
/* START sysfs data and methods */
#ifndef DISABLE_EDAC_SYSFS
set_kset_name("edac"),
};
-/* sysfs objects:
+/* sysfs object:
* /sys/devices/system/edac/mc
- * /sys/devices/system/edac/pci
*/
static struct kobject edac_memctrl_kobj;
-static struct kobject edac_pci_kobj;
/* We use these to wait for the reference counts on edac_memctrl_kobj and
* edac_pci_kobj to reach 0.
*/
static struct completion edac_memctrl_kobj_complete;
-static struct completion edac_pci_kobj_complete;
/*
* /sys/devices/system/edac/mc;
#endif /* DISABLE_EDAC_SYSFS */
}
+#ifdef CONFIG_PCI
+
#ifndef DISABLE_EDAC_SYSFS
/*
#endif
}
+
+static u16 get_pci_parity_status(struct pci_dev *dev, int secondary)
+{
+ int where;
+ u16 status;
+
+ where = secondary ? PCI_SEC_STATUS : PCI_STATUS;
+ pci_read_config_word(dev, where, &status);
+
+ /* If we get back 0xFFFF then we must suspect that the card has been
+ * pulled but the Linux PCI layer has not yet finished cleaning up.
+ * We don't want to report on such devices
+ */
+
+ if (status == 0xFFFF) {
+ u32 sanity;
+
+ pci_read_config_dword(dev, 0, &sanity);
+
+ if (sanity == 0xFFFFFFFF)
+ return 0;
+ }
+
+ status &= PCI_STATUS_DETECTED_PARITY | PCI_STATUS_SIG_SYSTEM_ERROR |
+ PCI_STATUS_PARITY;
+
+ if (status)
+ /* reset only the bits we are interested in */
+ pci_write_config_word(dev, where, status);
+
+ return status;
+}
+
+typedef void (*pci_parity_check_fn_t) (struct pci_dev *dev);
+
+/* Clear any PCI parity errors logged by this device. */
+static void edac_pci_dev_parity_clear(struct pci_dev *dev)
+{
+ u8 header_type;
+
+ get_pci_parity_status(dev, 0);
+
+ /* read the device TYPE, looking for bridges */
+ pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type);
+
+ if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE)
+ get_pci_parity_status(dev, 1);
+}
+
+/*
+ * PCI Parity polling
+ *
+ */
+static void edac_pci_dev_parity_test(struct pci_dev *dev)
+{
+ u16 status;
+ u8 header_type;
+
+ /* read the STATUS register on this device
+ */
+ status = get_pci_parity_status(dev, 0);
+
+ debugf2("PCI STATUS= 0x%04x %s\n", status, dev->dev.bus_id );
+
+ /* check the status reg for errors */
+ if (status) {
+ if (status & (PCI_STATUS_SIG_SYSTEM_ERROR))
+ edac_printk(KERN_CRIT, EDAC_PCI,
+ "Signaled System Error on %s\n",
+ pci_name(dev));
+
+ if (status & (PCI_STATUS_PARITY)) {
+ edac_printk(KERN_CRIT, EDAC_PCI,
+ "Master Data Parity Error on %s\n",
+ pci_name(dev));
+
+ atomic_inc(&pci_parity_count);
+ }
+
+ if (status & (PCI_STATUS_DETECTED_PARITY)) {
+ edac_printk(KERN_CRIT, EDAC_PCI,
+ "Detected Parity Error on %s\n",
+ pci_name(dev));
+
+ atomic_inc(&pci_parity_count);
+ }
+ }
+
+ /* read the device TYPE, looking for bridges */
+ pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type);
+
+ debugf2("PCI HEADER TYPE= 0x%02x %s\n", header_type, dev->dev.bus_id );
+
+ if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
+ /* On bridges, need to examine secondary status register */
+ status = get_pci_parity_status(dev, 1);
+
+ debugf2("PCI SEC_STATUS= 0x%04x %s\n",
+ status, dev->dev.bus_id );
+
+ /* check the secondary status reg for errors */
+ if (status) {
+ if (status & (PCI_STATUS_SIG_SYSTEM_ERROR))
+ edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
+ "Signaled System Error on %s\n",
+ pci_name(dev));
+
+ if (status & (PCI_STATUS_PARITY)) {
+ edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
+ "Master Data Parity Error on "
+ "%s\n", pci_name(dev));
+
+ atomic_inc(&pci_parity_count);
+ }
+
+ if (status & (PCI_STATUS_DETECTED_PARITY)) {
+ edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
+ "Detected Parity Error on %s\n",
+ pci_name(dev));
+
+ atomic_inc(&pci_parity_count);
+ }
+ }
+ }
+}
+
+/*
+ * check_dev_on_list: Scan for a PCI device on a white/black list
+ * @list: an EDAC &edac_pci_device_list white/black list pointer
+ * @free_index: index of next free entry on the list
+ * @pci_dev: PCI Device pointer
+ *
+ * see if list contains the device.
+ *
+ * Returns: 0 not found
+ * 1 found on list
+ */
+static int check_dev_on_list(struct edac_pci_device_list *list,
+ int free_index, struct pci_dev *dev)
+{
+ int i;
+ int rc = 0; /* Assume not found */
+ unsigned short vendor=dev->vendor;
+ unsigned short device=dev->device;
+
+ /* Scan the list, looking for a vendor/device match */
+ for (i = 0; i < free_index; i++, list++ ) {
+ if ((list->vendor == vendor ) && (list->device == device )) {
+ rc = 1;
+ break;
+ }
+ }
+
+ return rc;
+}
+
+/*
+ * pci_dev parity list iterator
+ * Scan the PCI device list for one iteration, looking for SERRORs
+ * Master Parity ERRORS or Parity ERRORs on primary or secondary devices
+ */
+static inline void edac_pci_dev_parity_iterator(pci_parity_check_fn_t fn)
+{
+ struct pci_dev *dev = NULL;
+
+ /* request for kernel access to the next PCI device, if any,
+ * and while we are looking at it have its reference count
+ * bumped until we are done with it
+ */
+ while((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
+ /* if whitelist exists then it has priority, so only scan
+ * those devices on the whitelist
+ */
+ if (pci_whitelist_count > 0 ) {
+ if (check_dev_on_list(pci_whitelist,
+ pci_whitelist_count, dev))
+ fn(dev);
+ } else {
+ /*
+ * if no whitelist, then check if this devices is
+ * blacklisted
+ */
+ if (!check_dev_on_list(pci_blacklist,
+ pci_blacklist_count, dev))
+ fn(dev);
+ }
+ }
+}
+
+static void do_pci_parity_check(void)
+{
+ unsigned long flags;
+ int before_count;
+
+ debugf3("%s()\n", __func__);
+
+ if (!check_pci_parity)
+ return;
+
+ before_count = atomic_read(&pci_parity_count);
+
+ /* scan all PCI devices looking for a Parity Error on devices and
+ * bridges
+ */
+ local_irq_save(flags);
+ edac_pci_dev_parity_iterator(edac_pci_dev_parity_test);
+ local_irq_restore(flags);
+
+ /* Only if operator has selected panic on PCI Error */
+ if (panic_on_pci_parity) {
+ /* If the count is different 'after' from 'before' */
+ if (before_count != atomic_read(&pci_parity_count))
+ panic("EDAC: PCI Parity Error");
+ }
+}
+
+static inline void clear_pci_parity_errors(void)
+{
+ /* Clear any PCI bus parity errors that devices initially have logged
+ * in their registers.
+ */
+ edac_pci_dev_parity_iterator(edac_pci_dev_parity_clear);
+}
+
+#else /* CONFIG_PCI */
+
+static inline void do_pci_parity_check(void)
+{
+ /* no-op */
+}
+
+static inline void clear_pci_parity_errors(void)
+{
+ /* no-op */
+}
+
+static void edac_sysfs_pci_teardown(void)
+{
+}
+
+static int edac_sysfs_pci_setup(void)
+{
+ return 0;
+}
+#endif /* CONFIG_PCI */
+
#ifndef DISABLE_EDAC_SYSFS
/* EDAC sysfs CSROW data structures and methods */
return err;
/* create a symlink for the device */
- err = sysfs_create_link(edac_mci_kobj, &mci->pdev->dev.kobj,
+ err = sysfs_create_link(edac_mci_kobj, &mci->dev->kobj,
EDAC_DEVICE_SYMLINK);
if (err)
debugf4("\tmci->edac_check = %p\n", mci->edac_check);
debugf3("\tmci->nr_csrows = %d, csrows = %p\n",
mci->nr_csrows, mci->csrows);
- debugf3("\tpdev = %p\n", mci->pdev);
+ debugf3("\tdev = %p\n", mci->dev);
debugf3("\tmod_name:ctl_name = %s:%s\n",
mci->mod_name, mci->ctl_name);
debugf3("\tpvt_info = %p\n\n", mci->pvt_info);
}
EXPORT_SYMBOL_GPL(edac_mc_free);
-static struct mem_ctl_info *find_mci_by_pdev(struct pci_dev *pdev)
+static struct mem_ctl_info *find_mci_by_dev(struct device *dev)
{
struct mem_ctl_info *mci;
struct list_head *item;
list_for_each(item, &mc_devices) {
mci = list_entry(item, struct mem_ctl_info, link);
- if (mci->pdev == pdev)
+ if (mci->dev == dev)
return mci;
}
return NULL;
}
-static int add_mc_to_global_list(struct mem_ctl_info *mci)
+/* Return 0 on success, 1 on failure.
+ * Before calling this function, caller must
+ * assign a unique value to mci->mc_idx.
+ */
+static int add_mc_to_global_list (struct mem_ctl_info *mci)
{
struct list_head *item, *insert_before;
struct mem_ctl_info *p;
- int i;
- if (list_empty(&mc_devices)) {
- mci->mc_idx = 0;
- insert_before = &mc_devices;
- } else {
- if (find_mci_by_pdev(mci->pdev)) {
- edac_printk(KERN_WARNING, EDAC_MC,
- "%s (%s) %s %s already assigned %d\n",
- mci->pdev->dev.bus_id,
- pci_name(mci->pdev), mci->mod_name,
- mci->ctl_name, mci->mc_idx);
- return 1;
- }
+ insert_before = &mc_devices;
- insert_before = NULL;
- i = 0;
+ if (unlikely((p = find_mci_by_dev(mci->dev)) != NULL))
+ goto fail0;
- list_for_each(item, &mc_devices) {
- p = list_entry(item, struct mem_ctl_info, link);
+ list_for_each(item, &mc_devices) {
+ p = list_entry(item, struct mem_ctl_info, link);
- if (p->mc_idx != i) {
- insert_before = item;
- break;
- }
+ if (p->mc_idx >= mci->mc_idx) {
+ if (unlikely(p->mc_idx == mci->mc_idx))
+ goto fail1;
- i++;
+ insert_before = item;
+ break;
}
-
- mci->mc_idx = i;
-
- if (insert_before == NULL)
- insert_before = &mc_devices;
}
list_add_tail_rcu(&mci->link, insert_before);
return 0;
+
+fail0:
+ edac_printk(KERN_WARNING, EDAC_MC,
+ "%s (%s) %s %s already assigned %d\n", p->dev->bus_id,
+ dev_name(p->dev), p->mod_name, p->ctl_name, p->mc_idx);
+ return 1;
+
+fail1:
+ edac_printk(KERN_WARNING, EDAC_MC,
+ "bug in low-level driver: attempt to assign\n"
+ " duplicate mc_idx %d in %s()\n", p->mc_idx, __func__);
+ return 1;
}
static void complete_mc_list_del(struct rcu_head *head)
* edac_mc_add_mc: Insert the 'mci' structure into the mci global list and
* create sysfs entries associated with mci structure
* @mci: pointer to the mci structure to be added to the list
+ * @mc_idx: A unique numeric identifier to be assigned to the 'mci' structure.
*
* Return:
* 0 Success
*/
/* FIXME - should a warning be printed if no error detection? correction? */
-int edac_mc_add_mc(struct mem_ctl_info *mci)
+int edac_mc_add_mc(struct mem_ctl_info *mci, int mc_idx)
{
debugf0("%s()\n", __func__);
+ mci->mc_idx = mc_idx;
#ifdef CONFIG_EDAC_DEBUG
if (edac_debug_level >= 3)
edac_mc_dump_mci(mci);
}
/* Report action taken */
- edac_mc_printk(mci, KERN_INFO, "Giving out device to %s %s: PCI %s\n",
- mci->mod_name, mci->ctl_name, pci_name(mci->pdev));
+ edac_mc_printk(mci, KERN_INFO, "Giving out device to %s %s: DEV %s\n",
+ mci->mod_name, mci->ctl_name, dev_name(mci->dev));
up(&mem_ctls_mutex);
return 0;
/**
* edac_mc_del_mc: Remove sysfs entries for specified mci structure and
* remove mci structure from global list
- * @pdev: Pointer to 'struct pci_dev' representing mci structure to remove.
+ * @pdev: Pointer to 'struct device' representing mci structure to remove.
*
* Return pointer to removed mci structure, or NULL if device not found.
*/
-struct mem_ctl_info * edac_mc_del_mc(struct pci_dev *pdev)
+struct mem_ctl_info * edac_mc_del_mc(struct device *dev)
{
struct mem_ctl_info *mci;
debugf0("MC: %s()\n", __func__);
down(&mem_ctls_mutex);
- if ((mci = find_mci_by_pdev(pdev)) == NULL) {
+ if ((mci = find_mci_by_dev(dev)) == NULL) {
up(&mem_ctls_mutex);
return NULL;
}
del_mc_from_global_list(mci);
up(&mem_ctls_mutex);
edac_printk(KERN_INFO, EDAC_MC,
- "Removed device %d for %s %s: PCI %s\n", mci->mc_idx,
- mci->mod_name, mci->ctl_name, pci_name(mci->pdev));
+ "Removed device %d for %s %s: DEV %s\n", mci->mc_idx,
+ mci->mod_name, mci->ctl_name, dev_name(mci->dev));
return mci;
}
EXPORT_SYMBOL_GPL(edac_mc_del_mc);
}
EXPORT_SYMBOL_GPL(edac_mc_handle_ue_no_info);
-#ifdef CONFIG_PCI
-
-static u16 get_pci_parity_status(struct pci_dev *dev, int secondary)
-{
- int where;
- u16 status;
-
- where = secondary ? PCI_SEC_STATUS : PCI_STATUS;
- pci_read_config_word(dev, where, &status);
-
- /* If we get back 0xFFFF then we must suspect that the card has been
- * pulled but the Linux PCI layer has not yet finished cleaning up.
- * We don't want to report on such devices
- */
-
- if (status == 0xFFFF) {
- u32 sanity;
-
- pci_read_config_dword(dev, 0, &sanity);
-
- if (sanity == 0xFFFFFFFF)
- return 0;
- }
-
- status &= PCI_STATUS_DETECTED_PARITY | PCI_STATUS_SIG_SYSTEM_ERROR |
- PCI_STATUS_PARITY;
-
- if (status)
- /* reset only the bits we are interested in */
- pci_write_config_word(dev, where, status);
-
- return status;
-}
-
-typedef void (*pci_parity_check_fn_t) (struct pci_dev *dev);
-
-/* Clear any PCI parity errors logged by this device. */
-static void edac_pci_dev_parity_clear(struct pci_dev *dev)
-{
- u8 header_type;
-
- get_pci_parity_status(dev, 0);
-
- /* read the device TYPE, looking for bridges */
- pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type);
-
- if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE)
- get_pci_parity_status(dev, 1);
-}
-
-/*
- * PCI Parity polling
- *
- */
-static void edac_pci_dev_parity_test(struct pci_dev *dev)
-{
- u16 status;
- u8 header_type;
-
- /* read the STATUS register on this device
- */
- status = get_pci_parity_status(dev, 0);
-
- debugf2("PCI STATUS= 0x%04x %s\n", status, dev->dev.bus_id );
-
- /* check the status reg for errors */
- if (status) {
- if (status & (PCI_STATUS_SIG_SYSTEM_ERROR))
- edac_printk(KERN_CRIT, EDAC_PCI,
- "Signaled System Error on %s\n",
- pci_name(dev));
-
- if (status & (PCI_STATUS_PARITY)) {
- edac_printk(KERN_CRIT, EDAC_PCI,
- "Master Data Parity Error on %s\n",
- pci_name(dev));
-
- atomic_inc(&pci_parity_count);
- }
-
- if (status & (PCI_STATUS_DETECTED_PARITY)) {
- edac_printk(KERN_CRIT, EDAC_PCI,
- "Detected Parity Error on %s\n",
- pci_name(dev));
-
- atomic_inc(&pci_parity_count);
- }
- }
-
- /* read the device TYPE, looking for bridges */
- pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type);
-
- debugf2("PCI HEADER TYPE= 0x%02x %s\n", header_type, dev->dev.bus_id );
-
- if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
- /* On bridges, need to examine secondary status register */
- status = get_pci_parity_status(dev, 1);
-
- debugf2("PCI SEC_STATUS= 0x%04x %s\n",
- status, dev->dev.bus_id );
-
- /* check the secondary status reg for errors */
- if (status) {
- if (status & (PCI_STATUS_SIG_SYSTEM_ERROR))
- edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
- "Signaled System Error on %s\n",
- pci_name(dev));
-
- if (status & (PCI_STATUS_PARITY)) {
- edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
- "Master Data Parity Error on "
- "%s\n", pci_name(dev));
-
- atomic_inc(&pci_parity_count);
- }
-
- if (status & (PCI_STATUS_DETECTED_PARITY)) {
- edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
- "Detected Parity Error on %s\n",
- pci_name(dev));
-
- atomic_inc(&pci_parity_count);
- }
- }
- }
-}
-
-/*
- * check_dev_on_list: Scan for a PCI device on a white/black list
- * @list: an EDAC &edac_pci_device_list white/black list pointer
- * @free_index: index of next free entry on the list
- * @pci_dev: PCI Device pointer
- *
- * see if list contains the device.
- *
- * Returns: 0 not found
- * 1 found on list
- */
-static int check_dev_on_list(struct edac_pci_device_list *list,
- int free_index, struct pci_dev *dev)
-{
- int i;
- int rc = 0; /* Assume not found */
- unsigned short vendor=dev->vendor;
- unsigned short device=dev->device;
-
- /* Scan the list, looking for a vendor/device match */
- for (i = 0; i < free_index; i++, list++ ) {
- if ((list->vendor == vendor ) && (list->device == device )) {
- rc = 1;
- break;
- }
- }
-
- return rc;
-}
-
-/*
- * pci_dev parity list iterator
- * Scan the PCI device list for one iteration, looking for SERRORs
- * Master Parity ERRORS or Parity ERRORs on primary or secondary devices
- */
-static inline void edac_pci_dev_parity_iterator(pci_parity_check_fn_t fn)
-{
- struct pci_dev *dev = NULL;
-
- /* request for kernel access to the next PCI device, if any,
- * and while we are looking at it have its reference count
- * bumped until we are done with it
- */
- while((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
- /* if whitelist exists then it has priority, so only scan
- * those devices on the whitelist
- */
- if (pci_whitelist_count > 0 ) {
- if (check_dev_on_list(pci_whitelist,
- pci_whitelist_count, dev))
- fn(dev);
- } else {
- /*
- * if no whitelist, then check if this devices is
- * blacklisted
- */
- if (!check_dev_on_list(pci_blacklist,
- pci_blacklist_count, dev))
- fn(dev);
- }
- }
-}
-
-static void do_pci_parity_check(void)
-{
- unsigned long flags;
- int before_count;
-
- debugf3("%s()\n", __func__);
-
- if (!check_pci_parity)
- return;
-
- before_count = atomic_read(&pci_parity_count);
-
- /* scan all PCI devices looking for a Parity Error on devices and
- * bridges
- */
- local_irq_save(flags);
- edac_pci_dev_parity_iterator(edac_pci_dev_parity_test);
- local_irq_restore(flags);
-
- /* Only if operator has selected panic on PCI Error */
- if (panic_on_pci_parity) {
- /* If the count is different 'after' from 'before' */
- if (before_count != atomic_read(&pci_parity_count))
- panic("EDAC: PCI Parity Error");
- }
-}
-
-static inline void clear_pci_parity_errors(void)
-{
- /* Clear any PCI bus parity errors that devices initially have logged
- * in their registers.
- */
- edac_pci_dev_parity_iterator(edac_pci_dev_parity_clear);
-}
-
-#else /* CONFIG_PCI */
-
-static inline void do_pci_parity_check(void)
-{
- /* no-op */
-}
-
-static inline void clear_pci_parity_errors(void)
-{
- /* no-op */
-}
-
-#endif /* CONFIG_PCI */
/*
* Iterate over all MC instances and check for ECC, et al, errors
module_param(panic_on_ue, int, 0644);
MODULE_PARM_DESC(panic_on_ue, "Panic on uncorrected error: 0=off 1=on");
+#ifdef CONFIG_PCI
module_param(check_pci_parity, int, 0644);
MODULE_PARM_DESC(check_pci_parity, "Check for PCI bus parity errors: 0=off 1=on");
module_param(panic_on_pci_parity, int, 0644);
MODULE_PARM_DESC(panic_on_pci_parity, "Panic on PCI Bus Parity error: 0=off 1=on");
+#endif
module_param(log_ue, int, 0644);
MODULE_PARM_DESC(log_ue, "Log uncorrectable error to console: 0=off 1=on");
module_param(log_ce, int, 0644);
#ifndef _EDAC_MC_H_
#define _EDAC_MC_H_
- #include <linux/config.h>
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/module.h>
#define PCI_VEND_DEV(vend, dev) PCI_VENDOR_ID_ ## vend, \
PCI_DEVICE_ID_ ## vend ## _ ## dev
+#if defined(CONFIG_X86) && defined(CONFIG_PCI)
+#define dev_name(dev) pci_name(to_pci_dev(dev))
+#else
+#define dev_name(dev) to_platform_device(dev)->name
+#endif
+
/* memory devices */
enum dev_type {
DEV_UNKNOWN = 0,
struct csrow_info *csrows;
/*
* FIXME - what about controllers on other busses? - IDs must be
- * unique. pdev pointer should be sufficiently unique, but
+ * unique. dev pointer should be sufficiently unique, but
* BUS:SLOT.FUNC numbers may not be unique.
*/
- struct pci_dev *pdev;
+ struct device *dev;
const char *mod_name;
const char *mod_ver;
const char *ctl_name;
struct completion kobj_complete;
};
+#ifdef CONFIG_PCI
+
/* write all or some bits in a byte-register*/
static inline void pci_write_bits8(struct pci_dev *pdev, int offset, u8 value,
u8 mask)
pci_write_config_dword(pdev, offset, value);
}
+#endif /* CONFIG_PCI */
+
#ifdef CONFIG_EDAC_DEBUG
void edac_mc_dump_channel(struct channel_info *chan);
void edac_mc_dump_mci(struct mem_ctl_info *mci);
void edac_mc_dump_csrow(struct csrow_info *csrow);
#endif /* CONFIG_EDAC_DEBUG */
-extern int edac_mc_add_mc(struct mem_ctl_info *mci);
-extern struct mem_ctl_info * edac_mc_del_mc(struct pci_dev *pdev);
+extern int edac_mc_add_mc(struct mem_ctl_info *mci,int mc_idx);
+extern struct mem_ctl_info * edac_mc_del_mc(struct device *dev);
extern int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci,
unsigned long page);
extern void edac_mc_scrub_block(unsigned long page, unsigned long offset,
* by Thayne Harbaugh of Linux Networx. (http://lnxi.com)
*/
- #include <linux/config.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/slab.h>
#include "edac_mc.h"
+#define I82860_REVISION " Ver: 2.0.0 " __DATE__
+
#define i82860_printk(level, fmt, arg...) \
edac_printk(level, "i82860", fmt, ##arg)
static void i82860_get_error_info(struct mem_ctl_info *mci,
struct i82860_error_info *info)
{
+ struct pci_dev *pdev;
+
+ pdev = to_pci_dev(mci->dev);
+
/*
* This is a mess because there is no atomic way to read all the
* registers at once and the registers can transition from CE being
* overwritten by UE.
*/
- pci_read_config_word(mci->pdev, I82860_ERRSTS, &info->errsts);
- pci_read_config_dword(mci->pdev, I82860_EAP, &info->eap);
- pci_read_config_word(mci->pdev, I82860_DERRCTL_STS, &info->derrsyn);
- pci_read_config_word(mci->pdev, I82860_ERRSTS, &info->errsts2);
+ pci_read_config_word(pdev, I82860_ERRSTS, &info->errsts);
+ pci_read_config_dword(pdev, I82860_EAP, &info->eap);
+ pci_read_config_word(pdev, I82860_DERRCTL_STS, &info->derrsyn);
+ pci_read_config_word(pdev, I82860_ERRSTS, &info->errsts2);
- pci_write_bits16(mci->pdev, I82860_ERRSTS, 0x0003, 0x0003);
+ pci_write_bits16(pdev, I82860_ERRSTS, 0x0003, 0x0003);
/*
* If the error is the same for both reads then the first set of reads
return;
if ((info->errsts ^ info->errsts2) & 0x0003) {
- pci_read_config_dword(mci->pdev, I82860_EAP, &info->eap);
- pci_read_config_word(mci->pdev, I82860_DERRCTL_STS,
+ pci_read_config_dword(pdev, I82860_EAP, &info->eap);
+ pci_read_config_word(pdev, I82860_DERRCTL_STS,
&info->derrsyn);
}
}
i82860_process_error_info(mci, &info, 1);
}
-static int i82860_probe1(struct pci_dev *pdev, int dev_idx)
+static void i82860_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev)
{
- int rc = -ENODEV;
- int index;
- struct mem_ctl_info *mci = NULL;
unsigned long last_cumul_size;
- struct i82860_error_info discard;
+ u16 mchcfg_ddim; /* DRAM Data Integrity Mode 0=none, 2=edac */
+ u16 value;
+ u32 cumul_size;
+ struct csrow_info *csrow;
+ int index;
+
+ pci_read_config_word(pdev, I82860_MCHCFG, &mchcfg_ddim);
+ mchcfg_ddim = mchcfg_ddim & 0x180;
+ last_cumul_size = 0;
+
+ /* The group row boundary (GRA) reg values are boundary address
+ * for each DRAM row with a granularity of 16MB. GRA regs are
+ * cumulative; therefore GRA15 will contain the total memory contained
+ * in all eight rows.
+ */
+ for (index = 0; index < mci->nr_csrows; index++) {
+ csrow = &mci->csrows[index];
+ pci_read_config_word(pdev, I82860_GBA + index * 2, &value);
+ cumul_size = (value & I82860_GBA_MASK) <<
+ (I82860_GBA_SHIFT - PAGE_SHIFT);
+ debugf3("%s(): (%d) cumul_size 0x%x\n", __func__, index,
+ cumul_size);
- u16 mchcfg_ddim; /* DRAM Data Integrity Mode 0=none,2=edac */
+ if (cumul_size == last_cumul_size)
+ continue; /* not populated */
+
+ csrow->first_page = last_cumul_size;
+ csrow->last_page = cumul_size - 1;
+ csrow->nr_pages = cumul_size - last_cumul_size;
+ last_cumul_size = cumul_size;
+ csrow->grain = 1 << 12; /* I82860_EAP has 4KiB reolution */
+ csrow->mtype = MEM_RMBS;
+ csrow->dtype = DEV_UNKNOWN;
+ csrow->edac_mode = mchcfg_ddim ? EDAC_SECDED : EDAC_NONE;
+ }
+}
+
+static int i82860_probe1(struct pci_dev *pdev, int dev_idx)
+{
+ struct mem_ctl_info *mci;
+ struct i82860_error_info discard;
/* RDRAM has channels but these don't map onto the abstractions that
edac uses.
return -ENOMEM;
debugf3("%s(): init mci\n", __func__);
- mci->pdev = pdev;
+ mci->dev = &pdev->dev;
mci->mtype_cap = MEM_FLAG_DDR;
-
mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED;
/* I"m not sure about this but I think that all RDRAM is SECDED */
mci->edac_cap = EDAC_FLAG_SECDED;
- /* adjust FLAGS */
-
mci->mod_name = EDAC_MOD_STR;
- mci->mod_ver = "$Revision: 1.1.2.6 $";
+ mci->mod_ver = I82860_REVISION;
mci->ctl_name = i82860_devs[dev_idx].ctl_name;
mci->edac_check = i82860_check;
mci->ctl_page_to_phys = NULL;
+ i82860_init_csrows(mci, pdev);
+ i82860_get_error_info(mci, &discard); /* clear counters */
- pci_read_config_word(mci->pdev, I82860_MCHCFG, &mchcfg_ddim);
- mchcfg_ddim = mchcfg_ddim & 0x180;
-
- /*
- * The group row boundary (GRA) reg values are boundary address
- * for each DRAM row with a granularity of 16MB. GRA regs are
- * cumulative; therefore GRA15 will contain the total memory contained
- * in all eight rows.
+ /* Here we assume that we will never see multiple instances of this
+ * type of memory controller. The ID is therefore hardcoded to 0.
*/
- for (last_cumul_size = index = 0; index < mci->nr_csrows; index++) {
- u16 value;
- u32 cumul_size;
- struct csrow_info *csrow = &mci->csrows[index];
-
- pci_read_config_word(mci->pdev, I82860_GBA + index * 2,
- &value);
-
- cumul_size = (value & I82860_GBA_MASK) <<
- (I82860_GBA_SHIFT - PAGE_SHIFT);
- debugf3("%s(): (%d) cumul_size 0x%x\n", __func__, index,
- cumul_size);
-
- if (cumul_size == last_cumul_size)
- continue; /* not populated */
-
- csrow->first_page = last_cumul_size;
- csrow->last_page = cumul_size - 1;
- csrow->nr_pages = cumul_size - last_cumul_size;
- last_cumul_size = cumul_size;
- csrow->grain = 1 << 12; /* I82860_EAP has 4KiB reolution */
- csrow->mtype = MEM_RMBS;
- csrow->dtype = DEV_UNKNOWN;
- csrow->edac_mode = mchcfg_ddim ? EDAC_SECDED : EDAC_NONE;
+ if (edac_mc_add_mc(mci,0)) {
+ debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
+ goto fail;
}
- i82860_get_error_info(mci, &discard); /* clear counters */
+ /* get this far and it's successful */
+ debugf3("%s(): success\n", __func__);
- if (edac_mc_add_mc(mci)) {
- debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
- edac_mc_free(mci);
- } else {
- /* get this far and it's successful */
- debugf3("%s(): success\n", __func__);
- rc = 0;
- }
+ return 0;
- return rc;
+fail:
+ edac_mc_free(mci);
+ return -ENODEV;
}
/* returns count (>= 0), or negative on error */
debugf0("%s()\n", __func__);
- if ((mci = edac_mc_del_mc(pdev)) == NULL)
+ if ((mci = edac_mc_del_mc(&pdev->dev)) == NULL)
return;
edac_mc_free(mci);
* Note: E7210 appears same as D82875P - zhenyu.z.wang at intel.com
*/
- #include <linux/config.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/slab.h>
#include "edac_mc.h"
+#define I82875P_REVISION " Ver: 2.0.0 " __DATE__
+
#define i82875p_printk(level, fmt, arg...) \
edac_printk(level, "i82875p", fmt, ##arg)
static void i82875p_get_error_info(struct mem_ctl_info *mci,
struct i82875p_error_info *info)
{
+ struct pci_dev *pdev;
+
+ pdev = to_pci_dev(mci->dev);
+
/*
* This is a mess because there is no atomic way to read all the
* registers at once and the registers can transition from CE being
* overwritten by UE.
*/
- pci_read_config_word(mci->pdev, I82875P_ERRSTS, &info->errsts);
- pci_read_config_dword(mci->pdev, I82875P_EAP, &info->eap);
- pci_read_config_byte(mci->pdev, I82875P_DES, &info->des);
- pci_read_config_byte(mci->pdev, I82875P_DERRSYN, &info->derrsyn);
- pci_read_config_word(mci->pdev, I82875P_ERRSTS, &info->errsts2);
+ pci_read_config_word(pdev, I82875P_ERRSTS, &info->errsts);
+ pci_read_config_dword(pdev, I82875P_EAP, &info->eap);
+ pci_read_config_byte(pdev, I82875P_DES, &info->des);
+ pci_read_config_byte(pdev, I82875P_DERRSYN, &info->derrsyn);
+ pci_read_config_word(pdev, I82875P_ERRSTS, &info->errsts2);
- pci_write_bits16(mci->pdev, I82875P_ERRSTS, 0x0081, 0x0081);
+ pci_write_bits16(pdev, I82875P_ERRSTS, 0x0081, 0x0081);
/*
* If the error is the same then we can for both reads then
return;
if ((info->errsts ^ info->errsts2) & 0x0081) {
- pci_read_config_dword(mci->pdev, I82875P_EAP, &info->eap);
- pci_read_config_byte(mci->pdev, I82875P_DES, &info->des);
- pci_read_config_byte(mci->pdev, I82875P_DERRSYN,
+ pci_read_config_dword(pdev, I82875P_EAP, &info->eap);
+ pci_read_config_byte(pdev, I82875P_DES, &info->des);
+ pci_read_config_byte(pdev, I82875P_DERRSYN,
&info->derrsyn);
}
}
extern int pci_proc_attach_device(struct pci_dev *);
#endif
-static int i82875p_probe1(struct pci_dev *pdev, int dev_idx)
+/* Return 0 on success or 1 on failure. */
+static int i82875p_setup_overfl_dev(struct pci_dev *pdev,
+ struct pci_dev **ovrfl_pdev, void __iomem **ovrfl_window)
{
- int rc = -ENODEV;
- int index;
- struct mem_ctl_info *mci = NULL;
- struct i82875p_pvt *pvt = NULL;
- unsigned long last_cumul_size;
- struct pci_dev *ovrfl_pdev;
- void __iomem *ovrfl_window = NULL;
- u32 drc;
- u32 drc_chan; /* Number of channels 0=1chan,1=2chan */
- u32 nr_chans;
- u32 drc_ddim; /* DRAM Data Integrity Mode 0=none,2=edac */
- struct i82875p_error_info discard;
+ struct pci_dev *dev;
+ void __iomem *window;
- debugf0("%s()\n", __func__);
- ovrfl_pdev = pci_get_device(PCI_VEND_DEV(INTEL, 82875_6), NULL);
+ *ovrfl_pdev = NULL;
+ *ovrfl_window = NULL;
+ dev = pci_get_device(PCI_VEND_DEV(INTEL, 82875_6), NULL);
- if (!ovrfl_pdev) {
- /*
- * Intel tells BIOS developers to hide device 6 which
+ if (dev == NULL) {
+ /* Intel tells BIOS developers to hide device 6 which
* configures the overflow device access containing
* the DRBs - this is where we expose device 6.
* http://www.x86-secret.com/articles/tweak/pat/patsecrets-2.htm
*/
pci_write_bits8(pdev, 0xf4, 0x2, 0x2);
- ovrfl_pdev =
- pci_scan_single_device(pdev->bus, PCI_DEVFN(6, 0));
+ dev = pci_scan_single_device(pdev->bus, PCI_DEVFN(6, 0));
- if (!ovrfl_pdev)
- return -ENODEV;
+ if (dev == NULL)
+ return 1;
}
+ *ovrfl_pdev = dev;
+
#ifdef CONFIG_PROC_FS
- if (!ovrfl_pdev->procent && pci_proc_attach_device(ovrfl_pdev)) {
- i82875p_printk(KERN_ERR,
- "%s(): Failed to attach overflow device\n", __func__);
- return -ENODEV;
+ if ((dev->procent == NULL) && pci_proc_attach_device(dev)) {
+ i82875p_printk(KERN_ERR, "%s(): Failed to attach overflow "
+ "device\n", __func__);
+ return 1;
}
-#endif
- /* CONFIG_PROC_FS */
- if (pci_enable_device(ovrfl_pdev)) {
- i82875p_printk(KERN_ERR,
- "%s(): Failed to enable overflow device\n", __func__);
- return -ENODEV;
+#endif /* CONFIG_PROC_FS */
+ if (pci_enable_device(dev)) {
+ i82875p_printk(KERN_ERR, "%s(): Failed to enable overflow "
+ "device\n", __func__);
+ return 1;
}
- if (pci_request_regions(ovrfl_pdev, pci_name(ovrfl_pdev))) {
+ if (pci_request_regions(dev, pci_name(dev))) {
#ifdef CORRECT_BIOS
goto fail0;
#endif
}
/* cache is irrelevant for PCI bus reads/writes */
- ovrfl_window = ioremap_nocache(pci_resource_start(ovrfl_pdev, 0),
- pci_resource_len(ovrfl_pdev, 0));
+ window = ioremap_nocache(pci_resource_start(dev, 0),
+ pci_resource_len(dev, 0));
- if (!ovrfl_window) {
+ if (window == NULL) {
i82875p_printk(KERN_ERR, "%s(): Failed to ioremap bar6\n",
- __func__);
+ __func__);
goto fail1;
}
- /* need to find out the number of channels */
- drc = readl(ovrfl_window + I82875P_DRC);
- drc_chan = ((drc >> 21) & 0x1);
- nr_chans = drc_chan + 1;
+ *ovrfl_window = window;
+ return 0;
- drc_ddim = (drc >> 18) & 0x1;
- mci = edac_mc_alloc(sizeof(*pvt), I82875P_NR_CSROWS(nr_chans),
- nr_chans);
+fail1:
+ pci_release_regions(dev);
- if (!mci) {
- rc = -ENOMEM;
- goto fail2;
- }
+#ifdef CORRECT_BIOS
+fail0:
+ pci_disable_device(dev);
+#endif
+ /* NOTE: the ovrfl proc entry and pci_dev are intentionally left */
+ return 1;
+}
- debugf3("%s(): init mci\n", __func__);
- mci->pdev = pdev;
- mci->mtype_cap = MEM_FLAG_DDR;
- mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED;
- mci->edac_cap = EDAC_FLAG_UNKNOWN;
- /* adjust FLAGS */
- mci->mod_name = EDAC_MOD_STR;
- mci->mod_ver = "$Revision: 1.5.2.11 $";
- mci->ctl_name = i82875p_devs[dev_idx].ctl_name;
- mci->edac_check = i82875p_check;
- mci->ctl_page_to_phys = NULL;
- debugf3("%s(): init pvt\n", __func__);
- pvt = (struct i82875p_pvt *) mci->pvt_info;
- pvt->ovrfl_pdev = ovrfl_pdev;
- pvt->ovrfl_window = ovrfl_window;
+/* Return 1 if dual channel mode is active. Else return 0. */
+static inline int dual_channel_active(u32 drc)
+{
+ return (drc >> 21) & 0x1;
+}
- /*
- * The dram row boundary (DRB) reg values are boundary address
+
+static void i82875p_init_csrows(struct mem_ctl_info *mci,
+ struct pci_dev *pdev, void __iomem *ovrfl_window, u32 drc)
+{
+ struct csrow_info *csrow;
+ unsigned long last_cumul_size;
+ u8 value;
+ u32 drc_ddim; /* DRAM Data Integrity Mode 0=none,2=edac */
+ u32 cumul_size;
+ int index;
+
+ drc_ddim = (drc >> 18) & 0x1;
+ last_cumul_size = 0;
+
+ /* The dram row boundary (DRB) reg values are boundary address
* for each DRAM row with a granularity of 32 or 64MB (single/dual
* channel operation). DRB regs are cumulative; therefore DRB7 will
* contain the total memory contained in all eight rows.
*/
- for (last_cumul_size = index = 0; index < mci->nr_csrows; index++) {
- u8 value;
- u32 cumul_size;
- struct csrow_info *csrow = &mci->csrows[index];
+
+ for (index = 0; index < mci->nr_csrows; index++) {
+ csrow = &mci->csrows[index];
value = readb(ovrfl_window + I82875P_DRB + index);
cumul_size = value << (I82875P_DRB_SHIFT - PAGE_SHIFT);
debugf3("%s(): (%d) cumul_size 0x%x\n", __func__, index,
cumul_size);
-
if (cumul_size == last_cumul_size)
continue; /* not populated */
csrow->last_page = cumul_size - 1;
csrow->nr_pages = cumul_size - last_cumul_size;
last_cumul_size = cumul_size;
- csrow->grain = 1 << 12; /* I82875P_EAP has 4KiB reolution */
+ csrow->grain = 1 << 12; /* I82875P_EAP has 4KiB reolution */
csrow->mtype = MEM_DDR;
csrow->dtype = DEV_UNKNOWN;
csrow->edac_mode = drc_ddim ? EDAC_SECDED : EDAC_NONE;
}
+}
+
+static int i82875p_probe1(struct pci_dev *pdev, int dev_idx)
+{
+ int rc = -ENODEV;
+ struct mem_ctl_info *mci;
+ struct i82875p_pvt *pvt;
+ struct pci_dev *ovrfl_pdev;
+ void __iomem *ovrfl_window;
+ u32 drc;
+ u32 nr_chans;
+ struct i82875p_error_info discard;
+
+ debugf0("%s()\n", __func__);
+ ovrfl_pdev = pci_get_device(PCI_VEND_DEV(INTEL, 82875_6), NULL);
+
+ if (i82875p_setup_overfl_dev(pdev, &ovrfl_pdev, &ovrfl_window))
+ return -ENODEV;
+ drc = readl(ovrfl_window + I82875P_DRC);
+ nr_chans = dual_channel_active(drc) + 1;
+ mci = edac_mc_alloc(sizeof(*pvt), I82875P_NR_CSROWS(nr_chans),
+ nr_chans);
+
+ if (!mci) {
+ rc = -ENOMEM;
+ goto fail0;
+ }
+ debugf3("%s(): init mci\n", __func__);
+ mci->dev = &pdev->dev;
+ mci->mtype_cap = MEM_FLAG_DDR;
+ mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED;
+ mci->edac_cap = EDAC_FLAG_UNKNOWN;
+ mci->mod_name = EDAC_MOD_STR;
+ mci->mod_ver = I82875P_REVISION;
+ mci->ctl_name = i82875p_devs[dev_idx].ctl_name;
+ mci->edac_check = i82875p_check;
+ mci->ctl_page_to_phys = NULL;
+ debugf3("%s(): init pvt\n", __func__);
+ pvt = (struct i82875p_pvt *) mci->pvt_info;
+ pvt->ovrfl_pdev = ovrfl_pdev;
+ pvt->ovrfl_window = ovrfl_window;
+ i82875p_init_csrows(mci, pdev, ovrfl_window, drc);
i82875p_get_error_info(mci, &discard); /* clear counters */
- if (edac_mc_add_mc(mci)) {
+ /* Here we assume that we will never see multiple instances of this
+ * type of memory controller. The ID is therefore hardcoded to 0.
+ */
+ if (edac_mc_add_mc(mci,0)) {
debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
- goto fail3;
+ goto fail1;
}
/* get this far and it's successful */
debugf3("%s(): success\n", __func__);
return 0;
-fail3:
+fail1:
edac_mc_free(mci);
-fail2:
+fail0:
iounmap(ovrfl_window);
-
-fail1:
pci_release_regions(ovrfl_pdev);
-#ifdef CORRECT_BIOS
-fail0:
-#endif
pci_disable_device(ovrfl_pdev);
/* NOTE: the ovrfl proc entry and pci_dev are intentionally left */
return rc;
debugf0("%s()\n", __func__);
- if ((mci = edac_mc_del_mc(pdev)) == NULL)
+ if ((mci = edac_mc_del_mc(&pdev->dev)) == NULL)
return;
pvt = (struct i82875p_pvt *) mci->pvt_info;
* references to this document given in []
*/
- #include <linux/config.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/slab.h>
#include "edac_mc.h"
+#define R82600_REVISION " Ver: 2.0.0 " __DATE__
+
#define r82600_printk(level, fmt, arg...) \
edac_printk(level, "r82600", fmt, ##arg)
static void r82600_get_error_info (struct mem_ctl_info *mci,
struct r82600_error_info *info)
{
- pci_read_config_dword(mci->pdev, R82600_EAP, &info->eapr);
+ struct pci_dev *pdev;
+
+ pdev = to_pci_dev(mci->dev);
+ pci_read_config_dword(pdev, R82600_EAP, &info->eapr);
if (info->eapr & BIT(0))
/* Clear error to allow next error to be reported [p.62] */
- pci_write_bits32(mci->pdev, R82600_EAP,
+ pci_write_bits32(pdev, R82600_EAP,
((u32) BIT(0) & (u32) BIT(1)),
((u32) BIT(0) & (u32) BIT(1)));
if (info->eapr & BIT(1))
/* Clear error to allow next error to be reported [p.62] */
- pci_write_bits32(mci->pdev, R82600_EAP,
+ pci_write_bits32(pdev, R82600_EAP,
((u32) BIT(0) & (u32) BIT(1)),
((u32) BIT(0) & (u32) BIT(1)));
}
r82600_process_error_info(mci, &info, 1);
}
-static int r82600_probe1(struct pci_dev *pdev, int dev_idx)
+static inline int ecc_enabled(u8 dramcr)
+{
+ return dramcr & BIT(5);
+}
+
+static void r82600_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,
+ u8 dramcr)
{
- int rc = -ENODEV;
+ struct csrow_info *csrow;
int index;
- struct mem_ctl_info *mci = NULL;
+ u8 drbar; /* SDRAM Row Boundry Address Register */
+ u32 row_high_limit, row_high_limit_last;
+ u32 reg_sdram, ecc_on, row_base;
+
+ ecc_on = ecc_enabled(dramcr);
+ reg_sdram = dramcr & BIT(4);
+ row_high_limit_last = 0;
+
+ for (index = 0; index < mci->nr_csrows; index++) {
+ csrow = &mci->csrows[index];
+
+ /* find the DRAM Chip Select Base address and mask */
+ pci_read_config_byte(pdev, R82600_DRBA + index, &drbar);
+
+ debugf1("%s() Row=%d DRBA = %#0x\n", __func__, index, drbar);
+
+ row_high_limit = ((u32) drbar << 24);
+/* row_high_limit = ((u32)drbar << 24) | 0xffffffUL; */
+
+ debugf1("%s() Row=%d, Boundry Address=%#0x, Last = %#0x\n",
+ __func__, index, row_high_limit, row_high_limit_last);
+
+ /* Empty row [p.57] */
+ if (row_high_limit == row_high_limit_last)
+ continue;
+
+ row_base = row_high_limit_last;
+
+ csrow->first_page = row_base >> PAGE_SHIFT;
+ csrow->last_page = (row_high_limit >> PAGE_SHIFT) - 1;
+ csrow->nr_pages = csrow->last_page - csrow->first_page + 1;
+ /* Error address is top 19 bits - so granularity is *
+ * 14 bits */
+ csrow->grain = 1 << 14;
+ csrow->mtype = reg_sdram ? MEM_RDDR : MEM_DDR;
+ /* FIXME - check that this is unknowable with this chipset */
+ csrow->dtype = DEV_UNKNOWN;
+
+ /* Mode is global on 82600 */
+ csrow->edac_mode = ecc_on ? EDAC_SECDED : EDAC_NONE;
+ row_high_limit_last = row_high_limit;
+ }
+}
+
+static int r82600_probe1(struct pci_dev *pdev, int dev_idx)
+{
+ struct mem_ctl_info *mci;
u8 dramcr;
- u32 ecc_on;
- u32 reg_sdram;
u32 eapr;
u32 scrub_disabled;
u32 sdram_refresh_rate;
- u32 row_high_limit_last = 0;
struct r82600_error_info discard;
debugf0("%s()\n", __func__);
pci_read_config_byte(pdev, R82600_DRAMC, &dramcr);
pci_read_config_dword(pdev, R82600_EAP, &eapr);
- ecc_on = dramcr & BIT(5);
- reg_sdram = dramcr & BIT(4);
scrub_disabled = eapr & BIT(31);
sdram_refresh_rate = dramcr & (BIT(0) | BIT(1));
debugf2("%s(): sdram refresh rate = %#0x\n", __func__,
debugf2("%s(): DRAMC register = %#0x\n", __func__, dramcr);
mci = edac_mc_alloc(0, R82600_NR_CSROWS, R82600_NR_CHANS);
- if (mci == NULL) {
- rc = -ENOMEM;
- goto fail;
- }
+ if (mci == NULL)
+ return -ENOMEM;
debugf0("%s(): mci = %p\n", __func__, mci);
- mci->pdev = pdev;
+ mci->dev = &pdev->dev;
mci->mtype_cap = MEM_FLAG_RDDR | MEM_FLAG_DDR;
mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_EC | EDAC_FLAG_SECDED;
/* FIXME try to work out if the chip leads have been used for COM2
* is possible. */
mci->edac_cap = EDAC_FLAG_NONE | EDAC_FLAG_EC | EDAC_FLAG_SECDED;
- if (ecc_on) {
+ if (ecc_enabled(dramcr)) {
if (scrub_disabled)
debugf3("%s(): mci = %p - Scrubbing disabled! EAP: "
"%#0x\n", __func__, mci, eapr);
mci->edac_cap = EDAC_FLAG_NONE;
mci->mod_name = EDAC_MOD_STR;
- mci->mod_ver = "$Revision: 1.1.2.6 $";
+ mci->mod_ver = R82600_REVISION;
mci->ctl_name = "R82600";
mci->edac_check = r82600_check;
mci->ctl_page_to_phys = NULL;
-
- for (index = 0; index < mci->nr_csrows; index++) {
- struct csrow_info *csrow = &mci->csrows[index];
- u8 drbar; /* sDram Row Boundry Address Register */
- u32 row_high_limit;
- u32 row_base;
-
- /* find the DRAM Chip Select Base address and mask */
- pci_read_config_byte(mci->pdev, R82600_DRBA + index, &drbar);
-
- debugf1("MC%d: %s() Row=%d DRBA = %#0x\n", mci->mc_idx,
- __func__, index, drbar);
-
- row_high_limit = ((u32) drbar << 24);
-/* row_high_limit = ((u32)drbar << 24) | 0xffffffUL; */
-
- debugf1("MC%d: %s() Row=%d, Boundry Address=%#0x, Last = "
- "%#0x \n", mci->mc_idx, __func__, index,
- row_high_limit, row_high_limit_last);
-
- /* Empty row [p.57] */
- if (row_high_limit == row_high_limit_last)
- continue;
-
- row_base = row_high_limit_last;
- csrow->first_page = row_base >> PAGE_SHIFT;
- csrow->last_page = (row_high_limit >> PAGE_SHIFT) - 1;
- csrow->nr_pages = csrow->last_page - csrow->first_page + 1;
- /* Error address is top 19 bits - so granularity is *
- * 14 bits */
- csrow->grain = 1 << 14;
- csrow->mtype = reg_sdram ? MEM_RDDR : MEM_DDR;
- /* FIXME - check that this is unknowable with this chipset */
- csrow->dtype = DEV_UNKNOWN;
-
- /* Mode is global on 82600 */
- csrow->edac_mode = ecc_on ? EDAC_SECDED : EDAC_NONE;
- row_high_limit_last = row_high_limit;
- }
-
+ r82600_init_csrows(mci, pdev, dramcr);
r82600_get_error_info(mci, &discard); /* clear counters */
- if (edac_mc_add_mc(mci)) {
+ /* Here we assume that we will never see multiple instances of this
+ * type of memory controller. The ID is therefore hardcoded to 0.
+ */
+ if (edac_mc_add_mc(mci,0)) {
debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
goto fail;
}
if (disable_hardware_scrub) {
debugf3("%s(): Disabling Hardware Scrub (scrub on error)\n",
__func__);
- pci_write_bits32(mci->pdev, R82600_EAP, BIT(31), BIT(31));
+ pci_write_bits32(pdev, R82600_EAP, BIT(31), BIT(31));
}
debugf3("%s(): success\n", __func__);
return 0;
fail:
- if (mci)
- edac_mc_free(mci);
-
- return rc;
+ edac_mc_free(mci);
+ return -ENODEV;
}
/* returns count (>= 0), or negative on error */
debugf0("%s()\n", __func__);
- if ((mci = edac_mc_del_mc(pdev)) == NULL)
+ if ((mci = edac_mc_del_mc(&pdev->dev)) == NULL)
return;
edac_mc_free(mci);
*/
- #include <linux/config.h>
#include <linux/delay.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
/* Hybrid DVB card, DOES have a tda9887 */
if (btv->c.type == BTTV_BOARD_DVICO_FUSIONHDTV_5_LITE)
tda9887 = 1;
- if((btv->tuner_type == TUNER_PHILIPS_FM1216ME_MK3) ||
- (btv->tuner_type == TUNER_PHILIPS_FM1236_MK3) ||
- (btv->tuner_type == TUNER_PHILIPS_FM1256_IH3) ||
- tda9887)
- request_module("tda9887");
if (btv->tuner_type != UNSET)
request_module("tuner");
}
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
- #include <linux/config.h>
#include <linux/init.h>
#include <linux/list.h>
#include <linux/module.h>
/* load i2c helpers */
if (TUNER_ABSENT != dev->tuner_type)
request_module("tuner");
- if (dev->tda9887_conf)
- request_module("tda9887");
if (card_is_empress(dev)) {
request_module("saa6752hs");
request_module_depend("saa7134-empress",&need_empress);
#define PRISM2_PCCARD
- #include <linux/config.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/if.h>
PCMCIA_DEVICE_MANF_CARD(0x02d2, 0x0001),
PCMCIA_DEVICE_MANF_CARD(0x50c2, 0x0001),
PCMCIA_DEVICE_MANF_CARD(0x50c2, 0x7300),
- PCMCIA_DEVICE_MANF_CARD(0xc00f, 0x0000),
+/* PCMCIA_DEVICE_MANF_CARD(0xc00f, 0x0000), conflict with pcnet_cs */
PCMCIA_DEVICE_MANF_CARD(0xd601, 0x0002),
PCMCIA_DEVICE_MANF_CARD(0xd601, 0x0005),
PCMCIA_DEVICE_MANF_CARD(0xd601, 0x0010),
* David Pye <dmp@davidmpye.dyndns.org>
*/
- #include <linux/config.h>
#include <linux/module.h>
#include <linux/stddef.h> /* for offsetof() */
#include <linux/init.h>
static __inline__ int led_get_diskio_activity(void)
{
static unsigned long last_pgpgin, last_pgpgout;
- struct page_state pgstat;
+ unsigned long events[NR_VM_EVENT_ITEMS];
int changed;
- get_full_page_state(&pgstat); /* get no of sectors in & out */
+ all_vm_events(events);
/* Just use a very simple calculation here. Do not care about overflow,
since we only want to know if there was activity or not. */
- changed = (pgstat.pgpgin != last_pgpgin) || (pgstat.pgpgout != last_pgpgout);
- last_pgpgin = pgstat.pgpgin;
- last_pgpgout = pgstat.pgpgout;
+ changed = (events[PGPGIN] != last_pgpgin) ||
+ (events[PGPGOUT] != last_pgpgout);
+ last_pgpgin = events[PGPGIN];
+ last_pgpgout = events[PGPGOUT];
return (changed ? LED_DISK_IO : 0);
}
*
*/
- #include <linux/config.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/errno.h>
.socket_suspend = db1x00_socket_suspend
};
-int __init au1x_board_init(struct device *dev)
+int au1x_board_init(struct device *dev)
{
int ret = -ENODEV;
bcsr->pcmcia = 0; /* turn off power, if it's not already off */
/*****************************************************************************/
- #include <linux/config.h>
#include <linux/module.h>
#include <linux/fs.h>
#include <linux/mount.h>
sinfo.si_errno = EPIPE;
sinfo.si_code = SI_ASYNCIO;
sinfo.si_addr = ds->disccontext;
- kill_proc_info_as_uid(ds->discsignr, &sinfo, ds->disc_pid, ds->disc_uid, ds->disc_euid);
+ kill_proc_info_as_uid(ds->discsignr, &sinfo, ds->disc_pid, ds->disc_uid, ds->disc_euid, ds->secid);
}
}
}
* async buffer flushing, 1999 Andrea Arcangeli <andrea@suse.de>
*/
- #include <linux/config.h>
#include <linux/kernel.h>
#include <linux/syscalls.h>
#include <linux/fs.h>
write_lock_irq(&mapping->tree_lock);
if (page->mapping) { /* Race with truncate? */
if (mapping_cap_account_dirty(mapping))
- inc_page_state(nr_dirty);
+ __inc_zone_page_state(page, NR_FILE_DIRTY);
radix_tree_tag_set(&mapping->page_tree,
page_index(page),
PAGECACHE_TAG_DIRTY);
* (C) 1997 Linus Torvalds
*/
- #include <linux/config.h>
#include <linux/fs.h>
#include <linux/mm.h>
#include <linux/dcache.h>
nr_pruned++;
}
inodes_stat.nr_unused -= nr_pruned;
+ if (current_is_kswapd())
+ __count_vm_events(KSWAPD_INODESTEAL, reap);
+ else
+ __count_vm_events(PGINODESTEAL, reap);
spin_unlock(&inode_lock);
dispose_list(&freeable);
mutex_unlock(&iprune_mutex);
-
- if (current_is_kswapd())
- mod_page_state(kswapd_inodesteal, reap);
- else
- mod_page_state(pginodesteal, reap);
}
/*
*
*/
- #include <linux/config.h>
#include <linux/slab.h>
#include <linux/file.h>
#include <linux/sunrpc/clnt.h>
req->wb_index, NFS_PAGE_TAG_DIRTY);
nfs_list_remove_request(req);
nfs_list_add_request(req, dst);
+ dec_zone_page_state(req->wb_page, NR_FILE_DIRTY);
res++;
}
}
* Copyright (C) 1996, 1997, Olaf Kirch <okir@monad.swb.de>
*/
- #include <linux/config.h>
#include <linux/types.h>
#include <linux/slab.h>
#include <linux/mm.h>
nfs_list_add_request(req, &nfsi->dirty);
nfsi->ndirty++;
spin_unlock(&nfsi->req_lock);
- inc_page_state(nr_dirty);
+ inc_zone_page_state(req->wb_page, NR_FILE_DIRTY);
mark_inode_dirty(inode);
}
nfs_list_add_request(req, &nfsi->commit);
nfsi->ncommit++;
spin_unlock(&nfsi->req_lock);
- inc_page_state(nr_unstable);
+ inc_zone_page_state(req->wb_page, NR_UNSTABLE_NFS);
mark_inode_dirty(inode);
}
#endif
if (nfsi->ndirty != 0) {
res = nfs_scan_lock_dirty(nfsi, dst, idx_start, npages);
nfsi->ndirty -= res;
- sub_page_state(nr_dirty,res);
if ((nfsi->ndirty == 0) != list_empty(&nfsi->dirty))
printk(KERN_ERR "NFS: desynchronized value of nfs_i.ndirty.\n");
}
{
struct nfs_write_data *data = calldata;
struct nfs_page *req;
- int res = 0;
dprintk("NFS: %4d nfs_commit_done (status %d)\n",
task->tk_pid, task->tk_status);
while (!list_empty(&data->pages)) {
req = nfs_list_entry(data->pages.next);
nfs_list_remove_request(req);
+ dec_zone_page_state(req->wb_page, NR_UNSTABLE_NFS);
dprintk("NFS: commit (%s/%Ld %d@%Ld)",
req->wb_context->dentry->d_inode->i_sb->s_id,
nfs_mark_request_dirty(req);
next:
nfs_clear_page_writeback(req);
- res++;
}
- sub_page_state(nr_unstable,res);
}
static const struct rpc_call_ops nfs_commit_ops = {
* Zerocpy NFS support (C) 2002 Hirokazu Takahashi <taka@valinux.co.jp>
*/
- #include <linux/config.h>
#include <linux/string.h>
#include <linux/time.h>
#include <linux/errno.h>
goto out_nfserr;
if (access & MAY_WRITE) {
- flags = O_WRONLY|O_LARGEFILE;
+ if (access & MAY_READ)
+ flags = O_RDWR|O_LARGEFILE;
+ else
+ flags = O_WRONLY|O_LARGEFILE;
DQUOT_INIT(inode);
}
if (ra && ra->p_set)
file->f_ra = ra->p_ra;
- if (file->f_op->sendfile) {
+ if (file->f_op->sendfile && rqstp->rq_sendfile_ok) {
svc_pushback_unused_pages(rqstp);
err = file->f_op->sendfile(file, &offset, *count,
nfsd_read_actor, rqstp);
err = nfserrno(err);
}
- fh_unlock(ffhp);
dput(dnew);
+out_unlock:
+ fh_unlock(ffhp);
out:
return err;
out_nfserr:
err = nfserrno(err);
- goto out;
+ goto out_unlock;
}
/*
tdir = tdentry->d_inode;
err = (rqstp->rq_vers == 2) ? nfserr_acces : nfserr_xdev;
- if (fdir->i_sb != tdir->i_sb)
+ if (ffhp->fh_export != tfhp->fh_export)
goto out;
err = nfserr_perm;
#include <linux/mman.h>
#include <linux/proc_fs.h>
#include <linux/ioport.h>
- #include <linux/config.h>
#include <linux/mm.h>
#include <linux/mmzone.h>
#include <linux/pagemap.h>
{
struct sysinfo i;
int len;
- struct page_state ps;
unsigned long inactive;
unsigned long active;
unsigned long free;
struct vmalloc_info vmi;
long cached;
- get_page_state(&ps);
get_zone_counts(&active, &inactive, &free);
/*
allowed = ((totalram_pages - hugetlb_total_pages())
* sysctl_overcommit_ratio / 100) + total_swap_pages;
- cached = get_page_cache_size() - total_swapcache_pages - i.bufferram;
+ cached = global_page_state(NR_FILE_PAGES) -
+ total_swapcache_pages - i.bufferram;
if (cached < 0)
cached = 0;
"SwapFree: %8lu kB\n"
"Dirty: %8lu kB\n"
"Writeback: %8lu kB\n"
+ "AnonPages: %8lu kB\n"
"Mapped: %8lu kB\n"
"Slab: %8lu kB\n"
+ "PageTables: %8lu kB\n"
+ "NFS Unstable: %8lu kB\n"
+ "Bounce: %8lu kB\n"
"CommitLimit: %8lu kB\n"
"Committed_AS: %8lu kB\n"
- "PageTables: %8lu kB\n"
"VmallocTotal: %8lu kB\n"
"VmallocUsed: %8lu kB\n"
"VmallocChunk: %8lu kB\n",
K(i.freeram-i.freehigh),
K(i.totalswap),
K(i.freeswap),
- K(ps.nr_dirty),
- K(ps.nr_writeback),
- K(ps.nr_mapped),
- K(ps.nr_slab),
+ K(global_page_state(NR_FILE_DIRTY)),
+ K(global_page_state(NR_WRITEBACK)),
+ K(global_page_state(NR_ANON_PAGES)),
+ K(global_page_state(NR_FILE_MAPPED)),
+ K(global_page_state(NR_SLAB)),
+ K(global_page_state(NR_PAGETABLE)),
+ K(global_page_state(NR_UNSTABLE_NFS)),
+ K(global_page_state(NR_BOUNCE)),
K(allowed),
K(committed),
- K(ps.nr_page_table_pages),
(unsigned long)VMALLOC_TOTAL >> 10,
vmi.used >> 10,
vmi.largest_chunk >> 10
#define __KERNEL_SYSCALLS__
- #include <linux/config.h>
#include <linux/types.h>
#include <linux/module.h>
#include <linux/proc_fs.h>
cpu_set(cpu, cpu_possible_map);
}
+void __init __attribute__((weak)) smp_setup_processor_id(void)
+{
+}
+
asmlinkage void __init start_kernel(void)
{
char * command_line;
extern struct kernel_param __start___param[], __stop___param[];
+
+ smp_setup_processor_id();
+
/*
* Interrupts are still disabled. Do necessary setups, then
* enable them
* to allow signals to be sent reliably.
*/
- #include <linux/config.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <linux/smp_lock.h>
&& !capable(CAP_KILL))
return error;
- error = security_task_kill(t, info, sig);
+ error = security_task_kill(t, info, sig, 0);
if (!error)
audit_signal_info(sig, t); /* Let audit system see the signal */
return error;
/* like kill_proc_info(), but doesn't use uid/euid of "current" */
int kill_proc_info_as_uid(int sig, struct siginfo *info, pid_t pid,
- uid_t uid, uid_t euid)
+ uid_t uid, uid_t euid, u32 secid)
{
int ret = -EINVAL;
struct task_struct *p;
ret = -EPERM;
goto out_unlock;
}
+ ret = security_task_kill(p, info, sig, secid);
+ if (ret)
+ goto out_unlock;
if (sig && p->sighand) {
unsigned long flags;
spin_lock_irqsave(&p->sighand->siglock, flags);
* Removed it and replaced it with older style, 03/23/00, Bill Wendling
*/
- #include <linux/config.h>
#include <linux/module.h>
#include <linux/mm.h>
#include <linux/swap.h>
.strategy = &sysctl_intvec,
.extra1 = &zero,
},
- {
- .ctl_name = VM_ZONE_RECLAIM_INTERVAL,
- .procname = "zone_reclaim_interval",
- .data = &zone_reclaim_interval,
- .maxlen = sizeof(zone_reclaim_interval),
- .mode = 0644,
- .proc_handler = &proc_dointvec_jiffies,
- .strategy = &sysctl_jiffies,
- },
#endif
#ifdef CONFIG_X86_32
{
* most "normal" filesystems (but you don't /have/ to use this:
* the NFS filesystem used to do this differently, for example)
*/
- #include <linux/config.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/compiler.h>
radix_tree_delete(&mapping->page_tree, page->index);
page->mapping = NULL;
mapping->nrpages--;
- pagecache_acct(-1);
+ __dec_zone_page_state(page, NR_FILE_PAGES);
}
void remove_from_page_cache(struct page *page)
page->mapping = mapping;
page->index = offset;
mapping->nrpages++;
- pagecache_acct(1);
+ __inc_zone_page_state(page, NR_FILE_PAGES);
}
write_unlock_irq(&mapping->tree_lock);
radix_tree_preload_end();
*/
if (!did_readaround) {
majmin = VM_FAULT_MAJOR;
- inc_page_state(pgmajfault);
+ count_vm_event(PGMAJFAULT);
}
did_readaround = 1;
ra_pages = max_sane_readahead(file->f_ra.ra_pages);
page_not_uptodate:
if (!did_readaround) {
majmin = VM_FAULT_MAJOR;
- inc_page_state(pgmajfault);
+ count_vm_event(PGMAJFAULT);
}
lock_page(page);
* (lots of bits borrowed from Ingo Molnar & Andrew Morton)
*/
- #include <linux/config.h>
#include <linux/stddef.h>
#include <linux/mm.h>
#include <linux/swap.h>
kernel_map_pages(page, 1 << order, 0);
local_irq_save(flags);
- __mod_page_state(pgfree, 1 << order);
+ __count_vm_events(PGFREE, 1 << order);
free_one_page(page_zone(page), page, order);
local_irq_restore(flags);
}
}
#endif /* CONFIG_PM */
-static void zone_statistics(struct zonelist *zonelist, struct zone *z, int cpu)
-{
-#ifdef CONFIG_NUMA
- pg_data_t *pg = z->zone_pgdat;
- pg_data_t *orig = zonelist->zones[0]->zone_pgdat;
- struct per_cpu_pageset *p;
-
- p = zone_pcp(z, cpu);
- if (pg == orig) {
- p->numa_hit++;
- } else {
- p->numa_miss++;
- zone_pcp(zonelist->zones[0], cpu)->numa_foreign++;
- }
- if (pg == NODE_DATA(numa_node_id()))
- p->local_node++;
- else
- p->other_node++;
-#endif
-}
-
/*
* Free a 0-order page
*/
pcp = &zone_pcp(zone, get_cpu())->pcp[cold];
local_irq_save(flags);
- __inc_page_state(pgfree);
+ __count_vm_event(PGFREE);
list_add(&page->lru, &pcp->list);
pcp->count++;
if (pcp->count >= pcp->high) {
goto failed;
}
- __mod_page_state_zone(zone, pgalloc, 1 << order);
- zone_statistics(zonelist, zone, cpu);
+ __count_zone_vm_events(PGALLOC, zone, 1 << order);
+ zone_statistics(zonelist, zone);
local_irq_restore(flags);
put_cpu();
#define show_node(zone) do { } while (0)
#endif
-/*
- * Accumulate the page_state information across all CPUs.
- * The result is unavoidably approximate - it can change
- * during and after execution of this function.
- */
-static DEFINE_PER_CPU(struct page_state, page_states) = {0};
-
-atomic_t nr_pagecache = ATOMIC_INIT(0);
-EXPORT_SYMBOL(nr_pagecache);
-#ifdef CONFIG_SMP
-DEFINE_PER_CPU(long, nr_pagecache_local) = 0;
-#endif
-
-static void __get_page_state(struct page_state *ret, int nr, cpumask_t *cpumask)
-{
- unsigned cpu;
-
- memset(ret, 0, nr * sizeof(unsigned long));
- cpus_and(*cpumask, *cpumask, cpu_online_map);
-
- for_each_cpu_mask(cpu, *cpumask) {
- unsigned long *in;
- unsigned long *out;
- unsigned off;
- unsigned next_cpu;
-
- in = (unsigned long *)&per_cpu(page_states, cpu);
-
- next_cpu = next_cpu(cpu, *cpumask);
- if (likely(next_cpu < NR_CPUS))
- prefetch(&per_cpu(page_states, next_cpu));
-
- out = (unsigned long *)ret;
- for (off = 0; off < nr; off++)
- *out++ += *in++;
- }
-}
-
-void get_page_state_node(struct page_state *ret, int node)
-{
- int nr;
- cpumask_t mask = node_to_cpumask(node);
-
- nr = offsetof(struct page_state, GET_PAGE_STATE_LAST);
- nr /= sizeof(unsigned long);
-
- __get_page_state(ret, nr+1, &mask);
-}
-
-void get_page_state(struct page_state *ret)
-{
- int nr;
- cpumask_t mask = CPU_MASK_ALL;
-
- nr = offsetof(struct page_state, GET_PAGE_STATE_LAST);
- nr /= sizeof(unsigned long);
-
- __get_page_state(ret, nr + 1, &mask);
-}
-
-void get_full_page_state(struct page_state *ret)
-{
- cpumask_t mask = CPU_MASK_ALL;
-
- __get_page_state(ret, sizeof(*ret) / sizeof(unsigned long), &mask);
-}
-
-unsigned long read_page_state_offset(unsigned long offset)
-{
- unsigned long ret = 0;
- int cpu;
-
- for_each_online_cpu(cpu) {
- unsigned long in;
-
- in = (unsigned long)&per_cpu(page_states, cpu) + offset;
- ret += *((unsigned long *)in);
- }
- return ret;
-}
-
-void __mod_page_state_offset(unsigned long offset, unsigned long delta)
-{
- void *ptr;
-
- ptr = &__get_cpu_var(page_states);
- *(unsigned long *)(ptr + offset) += delta;
-}
-EXPORT_SYMBOL(__mod_page_state_offset);
-
-void mod_page_state_offset(unsigned long offset, unsigned long delta)
-{
- unsigned long flags;
- void *ptr;
-
- local_irq_save(flags);
- ptr = &__get_cpu_var(page_states);
- *(unsigned long *)(ptr + offset) += delta;
- local_irq_restore(flags);
-}
-EXPORT_SYMBOL(mod_page_state_offset);
-
-void __get_zone_counts(unsigned long *active, unsigned long *inactive,
- unsigned long *free, struct pglist_data *pgdat)
-{
- struct zone *zones = pgdat->node_zones;
- int i;
-
- *active = 0;
- *inactive = 0;
- *free = 0;
- for (i = 0; i < MAX_NR_ZONES; i++) {
- *active += zones[i].nr_active;
- *inactive += zones[i].nr_inactive;
- *free += zones[i].free_pages;
- }
-}
-
-void get_zone_counts(unsigned long *active,
- unsigned long *inactive, unsigned long *free)
-{
- struct pglist_data *pgdat;
-
- *active = 0;
- *inactive = 0;
- *free = 0;
- for_each_online_pgdat(pgdat) {
- unsigned long l, m, n;
- __get_zone_counts(&l, &m, &n, pgdat);
- *active += l;
- *inactive += m;
- *free += n;
- }
-}
-
void si_meminfo(struct sysinfo *val)
{
val->totalram = totalram_pages;
*/
void show_free_areas(void)
{
- struct page_state ps;
int cpu, temperature;
unsigned long active;
unsigned long inactive;
}
}
- get_page_state(&ps);
get_zone_counts(&active, &inactive, &free);
printk("Free pages: %11ukB (%ukB HighMem)\n",
"unstable:%lu free:%u slab:%lu mapped:%lu pagetables:%lu\n",
active,
inactive,
- ps.nr_dirty,
- ps.nr_writeback,
- ps.nr_unstable,
+ global_page_state(NR_FILE_DIRTY),
+ global_page_state(NR_WRITEBACK),
+ global_page_state(NR_UNSTABLE_NFS),
nr_free_pages(),
- ps.nr_slab,
- ps.nr_mapped,
- ps.nr_page_table_pages);
+ global_page_state(NR_SLAB),
+ global_page_state(NR_FILE_MAPPED),
+ global_page_state(NR_PAGETABLE));
for_each_zone(zone) {
int i;
zone->nr_scan_inactive = 0;
zone->nr_active = 0;
zone->nr_inactive = 0;
+ zap_zone_vm_stats(zone);
atomic_set(&zone->reclaim_in_progress, 0);
if (!size)
continue;
__pa(PAGE_OFFSET) >> PAGE_SHIFT, NULL);
}
-#ifdef CONFIG_PROC_FS
-
-#include <linux/seq_file.h>
-
-static void *frag_start(struct seq_file *m, loff_t *pos)
-{
- pg_data_t *pgdat;
- loff_t node = *pos;
- for (pgdat = first_online_pgdat();
- pgdat && node;
- pgdat = next_online_pgdat(pgdat))
- --node;
-
- return pgdat;
-}
-
-static void *frag_next(struct seq_file *m, void *arg, loff_t *pos)
-{
- pg_data_t *pgdat = (pg_data_t *)arg;
-
- (*pos)++;
- return next_online_pgdat(pgdat);
-}
-
-static void frag_stop(struct seq_file *m, void *arg)
-{
-}
-
-/*
- * This walks the free areas for each zone.
- */
-static int frag_show(struct seq_file *m, void *arg)
-{
- pg_data_t *pgdat = (pg_data_t *)arg;
- struct zone *zone;
- struct zone *node_zones = pgdat->node_zones;
- unsigned long flags;
- int order;
-
- for (zone = node_zones; zone - node_zones < MAX_NR_ZONES; ++zone) {
- if (!populated_zone(zone))
- continue;
-
- spin_lock_irqsave(&zone->lock, flags);
- seq_printf(m, "Node %d, zone %8s ", pgdat->node_id, zone->name);
- for (order = 0; order < MAX_ORDER; ++order)
- seq_printf(m, "%6lu ", zone->free_area[order].nr_free);
- spin_unlock_irqrestore(&zone->lock, flags);
- seq_putc(m, '\n');
- }
- return 0;
-}
-
-struct seq_operations fragmentation_op = {
- .start = frag_start,
- .next = frag_next,
- .stop = frag_stop,
- .show = frag_show,
-};
-
-/*
- * Output information about zones in @pgdat.
- */
-static int zoneinfo_show(struct seq_file *m, void *arg)
-{
- pg_data_t *pgdat = arg;
- struct zone *zone;
- struct zone *node_zones = pgdat->node_zones;
- unsigned long flags;
-
- for (zone = node_zones; zone - node_zones < MAX_NR_ZONES; zone++) {
- int i;
-
- if (!populated_zone(zone))
- continue;
-
- spin_lock_irqsave(&zone->lock, flags);
- seq_printf(m, "Node %d, zone %8s", pgdat->node_id, zone->name);
- seq_printf(m,
- "\n pages free %lu"
- "\n min %lu"
- "\n low %lu"
- "\n high %lu"
- "\n active %lu"
- "\n inactive %lu"
- "\n scanned %lu (a: %lu i: %lu)"
- "\n spanned %lu"
- "\n present %lu",
- zone->free_pages,
- zone->pages_min,
- zone->pages_low,
- zone->pages_high,
- zone->nr_active,
- zone->nr_inactive,
- zone->pages_scanned,
- zone->nr_scan_active, zone->nr_scan_inactive,
- zone->spanned_pages,
- zone->present_pages);
- seq_printf(m,
- "\n protection: (%lu",
- zone->lowmem_reserve[0]);
- for (i = 1; i < ARRAY_SIZE(zone->lowmem_reserve); i++)
- seq_printf(m, ", %lu", zone->lowmem_reserve[i]);
- seq_printf(m,
- ")"
- "\n pagesets");
- for_each_online_cpu(i) {
- struct per_cpu_pageset *pageset;
- int j;
-
- pageset = zone_pcp(zone, i);
- for (j = 0; j < ARRAY_SIZE(pageset->pcp); j++) {
- if (pageset->pcp[j].count)
- break;
- }
- if (j == ARRAY_SIZE(pageset->pcp))
- continue;
- for (j = 0; j < ARRAY_SIZE(pageset->pcp); j++) {
- seq_printf(m,
- "\n cpu: %i pcp: %i"
- "\n count: %i"
- "\n high: %i"
- "\n batch: %i",
- i, j,
- pageset->pcp[j].count,
- pageset->pcp[j].high,
- pageset->pcp[j].batch);
- }
-#ifdef CONFIG_NUMA
- seq_printf(m,
- "\n numa_hit: %lu"
- "\n numa_miss: %lu"
- "\n numa_foreign: %lu"
- "\n interleave_hit: %lu"
- "\n local_node: %lu"
- "\n other_node: %lu",
- pageset->numa_hit,
- pageset->numa_miss,
- pageset->numa_foreign,
- pageset->interleave_hit,
- pageset->local_node,
- pageset->other_node);
-#endif
- }
- seq_printf(m,
- "\n all_unreclaimable: %u"
- "\n prev_priority: %i"
- "\n temp_priority: %i"
- "\n start_pfn: %lu",
- zone->all_unreclaimable,
- zone->prev_priority,
- zone->temp_priority,
- zone->zone_start_pfn);
- spin_unlock_irqrestore(&zone->lock, flags);
- seq_putc(m, '\n');
- }
- return 0;
-}
-
-struct seq_operations zoneinfo_op = {
- .start = frag_start, /* iterate over all zones. The same as in
- * fragmentation. */
- .next = frag_next,
- .stop = frag_stop,
- .show = zoneinfo_show,
-};
-
-static char *vmstat_text[] = {
- "nr_dirty",
- "nr_writeback",
- "nr_unstable",
- "nr_page_table_pages",
- "nr_mapped",
- "nr_slab",
-
- "pgpgin",
- "pgpgout",
- "pswpin",
- "pswpout",
-
- "pgalloc_high",
- "pgalloc_normal",
- "pgalloc_dma32",
- "pgalloc_dma",
-
- "pgfree",
- "pgactivate",
- "pgdeactivate",
-
- "pgfault",
- "pgmajfault",
-
- "pgrefill_high",
- "pgrefill_normal",
- "pgrefill_dma32",
- "pgrefill_dma",
-
- "pgsteal_high",
- "pgsteal_normal",
- "pgsteal_dma32",
- "pgsteal_dma",
-
- "pgscan_kswapd_high",
- "pgscan_kswapd_normal",
- "pgscan_kswapd_dma32",
- "pgscan_kswapd_dma",
-
- "pgscan_direct_high",
- "pgscan_direct_normal",
- "pgscan_direct_dma32",
- "pgscan_direct_dma",
-
- "pginodesteal",
- "slabs_scanned",
- "kswapd_steal",
- "kswapd_inodesteal",
- "pageoutrun",
- "allocstall",
-
- "pgrotated",
- "nr_bounce",
-};
-
-static void *vmstat_start(struct seq_file *m, loff_t *pos)
-{
- struct page_state *ps;
-
- if (*pos >= ARRAY_SIZE(vmstat_text))
- return NULL;
-
- ps = kmalloc(sizeof(*ps), GFP_KERNEL);
- m->private = ps;
- if (!ps)
- return ERR_PTR(-ENOMEM);
- get_full_page_state(ps);
- ps->pgpgin /= 2; /* sectors -> kbytes */
- ps->pgpgout /= 2;
- return (unsigned long *)ps + *pos;
-}
-
-static void *vmstat_next(struct seq_file *m, void *arg, loff_t *pos)
-{
- (*pos)++;
- if (*pos >= ARRAY_SIZE(vmstat_text))
- return NULL;
- return (unsigned long *)m->private + *pos;
-}
-
-static int vmstat_show(struct seq_file *m, void *arg)
-{
- unsigned long *l = arg;
- unsigned long off = l - (unsigned long *)m->private;
-
- seq_printf(m, "%s %lu\n", vmstat_text[off], *l);
- return 0;
-}
-
-static void vmstat_stop(struct seq_file *m, void *arg)
-{
- kfree(m->private);
- m->private = NULL;
-}
-
-struct seq_operations vmstat_op = {
- .start = vmstat_start,
- .next = vmstat_next,
- .stop = vmstat_stop,
- .show = vmstat_show,
-};
-
-#endif /* CONFIG_PROC_FS */
-
#ifdef CONFIG_HOTPLUG_CPU
static int page_alloc_cpu_notify(struct notifier_block *self,
unsigned long action, void *hcpu)
{
int cpu = (unsigned long)hcpu;
- long *count;
- unsigned long *src, *dest;
if (action == CPU_DEAD) {
- int i;
-
- /* Drain local pagecache count. */
- count = &per_cpu(nr_pagecache_local, cpu);
- atomic_add(*count, &nr_pagecache);
- *count = 0;
local_irq_disable();
__drain_pages(cpu);
-
- /* Add dead cpu's page_states to our own. */
- dest = (unsigned long *)&__get_cpu_var(page_states);
- src = (unsigned long *)&per_cpu(page_states, cpu);
-
- for (i = 0; i < sizeof(struct page_state)/sizeof(unsigned long);
- i++) {
- dest[i] += src[i];
- src[i] = 0;
- }
-
+ vm_events_fold_cpu(cpu);
local_irq_enable();
+ refresh_cpu_vm_stats(cpu);
}
return NOTIFY_OK;
}
* which makes it a completely usable filesystem.
*/
- #include <linux/config.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/fs.h>
swappage = lookup_swap_cache(swap);
if (!swappage) {
shmem_swp_unmap(entry);
- spin_unlock(&info->lock);
/* here we actually do the io */
if (type && *type == VM_FAULT_MINOR) {
- inc_page_state(pgmajfault);
+ __count_vm_event(PGMAJFAULT);
*type = VM_FAULT_MAJOR;
}
+ spin_unlock(&info->lock);
swappage = shmem_swapin(info, swap, idx);
if (!swappage) {
spin_lock(&info->lock);
#undef DEBUG
#include <linux/capability.h>
- #include <linux/config.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/mman.h>
return 0;
}
+static void dummy_task_getsecid (struct task_struct *p, u32 *secid)
+{ }
+
static int dummy_task_setgroups (struct group_info *group_info)
{
return 0;
return 0;
}
+static int dummy_task_getioprio (struct task_struct *p)
+{
+ return 0;
+}
+
static int dummy_task_setrlimit (unsigned int resource, struct rlimit *new_rlim)
{
return 0;
}
static int dummy_task_kill (struct task_struct *p, struct siginfo *info,
- int sig)
+ int sig, u32 secid)
{
return 0;
}
set_to_dummy_if_null(ops, task_setpgid);
set_to_dummy_if_null(ops, task_getpgid);
set_to_dummy_if_null(ops, task_getsid);
+ set_to_dummy_if_null(ops, task_getsecid);
set_to_dummy_if_null(ops, task_setgroups);
set_to_dummy_if_null(ops, task_setnice);
set_to_dummy_if_null(ops, task_setioprio);
+ set_to_dummy_if_null(ops, task_getioprio);
set_to_dummy_if_null(ops, task_setrlimit);
set_to_dummy_if_null(ops, task_setscheduler);
set_to_dummy_if_null(ops, task_getscheduler);
* as published by the Free Software Foundation.
*/
- #include <linux/config.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/kernel.h>
return task_has_perm(current, p, PROCESS__GETSESSION);
}
+static void selinux_task_getsecid(struct task_struct *p, u32 *secid)
+{
+ selinux_get_task_sid(p, secid);
+}
+
static int selinux_task_setgroups(struct group_info *group_info)
{
/* See the comment for setuid above. */
return task_has_perm(current, p, PROCESS__SETSCHED);
}
+static int selinux_task_getioprio(struct task_struct *p)
+{
+ return task_has_perm(current, p, PROCESS__GETSCHED);
+}
+
static int selinux_task_setrlimit(unsigned int resource, struct rlimit *new_rlim)
{
struct rlimit *old_rlim = current->signal->rlim + resource;
return task_has_perm(current, p, PROCESS__SETSCHED);
}
-static int selinux_task_kill(struct task_struct *p, struct siginfo *info, int sig)
+static int selinux_task_kill(struct task_struct *p, struct siginfo *info,
+ int sig, u32 secid)
{
u32 perm;
int rc;
+ struct task_security_struct *tsec;
- rc = secondary_ops->task_kill(p, info, sig);
+ rc = secondary_ops->task_kill(p, info, sig, secid);
if (rc)
return rc;
perm = PROCESS__SIGNULL; /* null signal; existence test */
else
perm = signal_to_av(sig);
-
- return task_has_perm(current, p, perm);
+ tsec = p->security;
+ if (secid)
+ rc = avc_has_perm(secid, tsec->sid, SECCLASS_PROCESS, perm, NULL);
+ else
+ rc = task_has_perm(current, p, perm);
+ return rc;
}
static int selinux_task_prctl(int option,
.task_setpgid = selinux_task_setpgid,
.task_getpgid = selinux_task_getpgid,
.task_getsid = selinux_task_getsid,
+ .task_getsecid = selinux_task_getsecid,
.task_setgroups = selinux_task_setgroups,
.task_setnice = selinux_task_setnice,
.task_setioprio = selinux_task_setioprio,
+ .task_getioprio = selinux_task_getioprio,
.task_setrlimit = selinux_task_setrlimit,
.task_setscheduler = selinux_task_setscheduler,
.task_getscheduler = selinux_task_getscheduler,
projects / mv-sheeva.git / commitdiff