drm/radeon/kms: the SS_Id field in the LCD table if for LVDS only

For DP/eDP, always use the standard DP SS indices.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@gmail.com>

diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
index f5819ba481d961c15452c4c351b947c0c2d0b098..48f5ff023bca821d662e8a6f43adaba4468c84ce 100644 (file)
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -942,42 +942,24 @@ static void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode
                case ATOM_ENCODER_MODE_DP:
                        /* DP/eDP */
                        dp_clock = dig_connector->dp_clock / 10;
-                       if (radeon_encoder->active_device & (ATOM_DEVICE_LCD_SUPPORT)) {
-                               if (ASIC_IS_DCE4(rdev)) {
-                                       /* first try ASIC_INTERNAL_SS_ON_DP */
+                       if (ASIC_IS_DCE4(rdev))
+                               ss_enabled =
+                                       radeon_atombios_get_asic_ss_info(rdev, &ss,
+                                                                        ASIC_INTERNAL_SS_ON_DP,
+                                                                        dp_clock);
+                       else {
+                               if (dp_clock == 16200) {
                                        ss_enabled =
-                                               radeon_atombios_get_asic_ss_info(rdev, &ss,
-                                                                                ASIC_INTERNAL_SS_ON_DP,
-                                                                                dp_clock);
+                                               radeon_atombios_get_ppll_ss_info(rdev, &ss,
+                                                                                ATOM_DP_SS_ID2);
                                        if (!ss_enabled)
                                                ss_enabled =
-                                                       radeon_atombios_get_asic_ss_info(rdev, &ss,
-                                                                                        dig->lcd_ss_id,
-                                                                                        dp_clock);
+                                                       radeon_atombios_get_ppll_ss_info(rdev, &ss,
+                                                                                        ATOM_DP_SS_ID1);
                                } else
                                        ss_enabled =
                                                radeon_atombios_get_ppll_ss_info(rdev, &ss,
-                                                                                dig->lcd_ss_id);
-                       } else {
-                               if (ASIC_IS_DCE4(rdev))
-                                       ss_enabled =
-                                               radeon_atombios_get_asic_ss_info(rdev, &ss,
-                                                                                ASIC_INTERNAL_SS_ON_DP,
-                                                                                dp_clock);
-                               else {
-                                       if (dp_clock == 16200) {
-                                               ss_enabled =
-                                                       radeon_atombios_get_ppll_ss_info(rdev, &ss,
-                                                                                        ATOM_DP_SS_ID2);
-                                               if (!ss_enabled)
-                                                       ss_enabled =
-                                                               radeon_atombios_get_ppll_ss_info(rdev, &ss,
-                                                                                                ATOM_DP_SS_ID1);
-                                       } else
-                                               ss_enabled =
-                                                       radeon_atombios_get_ppll_ss_info(rdev, &ss,
-                                                                                        ATOM_DP_SS_ID1);
-                               }
+                                                                                ATOM_DP_SS_ID1);
                        }
                        break;
                case ATOM_ENCODER_MODE_LVDS: