static struct dma_async_tx_descriptor *mxs_dma_prep_slave_sg(
struct dma_chan *chan, struct scatterlist *sgl,
unsigned int sg_len, enum dma_data_direction direction,
- unsigned long flags)
+ unsigned long append)
{
struct mxs_dma_chan *mxs_chan = to_mxs_dma_chan(chan);
struct mxs_dma_engine *mxs_dma = mxs_chan->mxs_dma;
int i, j;
u32 *pio;
static int idx;
- bool append = flags & MXS_DMA_F_APPEND;
if (mxs_chan->status == DMA_IN_PROGRESS && !append)
return NULL;
ccw->bits |= CCW_CHAIN;
ccw->bits &= ~CCW_IRQ;
ccw->bits &= ~CCW_DEC_SEM;
+ ccw->bits &= ~CCW_WAIT4END;
} else {
idx = 0;
}
ccw->bits = 0;
ccw->bits |= CCW_IRQ;
ccw->bits |= CCW_DEC_SEM;
- if (flags & MXS_DMA_F_WAIT4END)
- ccw->bits |= CCW_WAIT4END;
+ ccw->bits |= CCW_WAIT4END;
ccw->bits |= CCW_HALT_ON_TERM;
ccw->bits |= CCW_TERM_FLUSH;
ccw->bits |= BF_CCW(sg_len, PIO_NUM);
ccw->bits &= ~CCW_CHAIN;
ccw->bits |= CCW_IRQ;
ccw->bits |= CCW_DEC_SEM;
- if (flags & MXS_DMA_F_WAIT4END)
- ccw->bits |= CCW_WAIT4END;
+ ccw->bits |= CCW_WAIT4END;
}
}
}