ARM: dts: imx27-phytec-phycore-som: Add NFC pin group

This patch adds pin group for NAND Flash Controller.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

diff --git a/arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi b/arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi
index 7087a4f920ef1d32905782da3d00977b450f1385..94ba726e9c2439d12c8918a23e74fb314d7e5168 100644 (file)
--- a/arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi
+++ b/arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi
@@ -201,10 +201,16 @@
                pinctrl_i2c2: i2c2grp {
                        fsl,pins = <MX27_I2C2_PINGRP1>;
                };
+
+               pinctrl_nfc: nfcgrp {
+                       fsl,pins = <MX27_NFC_PINGRP1>;
+               };
        };
 };
 
 &nfc {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_nfc>;
        nand-bus-width = <8>;
        nand-ecc-mode = "hw";
        nand-on-flash-bbt;

diff --git a/arch/arm/boot/dts/imx27-pingrp.h b/arch/arm/boot/dts/imx27-pingrp.h
index edc1e90d108f55b6d9fb698a1eabc5d2256cb0eb..61eb7107b848495de77b54f9470b92a6185719e6 100644 (file)
--- a/arch/arm/boot/dts/imx27-pingrp.h
+++ b/arch/arm/boot/dts/imx27-pingrp.h
@@ -85,6 +85,15 @@
        MX27_PAD_I2C2_SDA__I2C2_SDA 0x0 \
        MX27_PAD_I2C2_SCL__I2C2_SCL 0x0
 
+#define MX27_NFC_PINGRP1 \
+       MX27_PAD_NFRB__NFRB 0x0 \
+       MX27_PAD_NFCLE__NFCLE 0x0 \
+       MX27_PAD_NFWP_B__NFWP_B 0x0 \
+       MX27_PAD_NFCE_B__NFCE_B 0x0 \
+       MX27_PAD_NFALE__NFALE 0x0 \
+       MX27_PAD_NFRE_B__NFRE_B 0x0 \
+       MX27_PAD_NFWE_B__NFWE_B 0x0
+
 #define MX27_OWIRE1_PINGRP1 \
        MX27_PAD_RTCK__OWIRE 0x0