ahci: imx: PLL clock needs 100us to settle down

The commit e783c51 (ahci: imx: software workaround for phy reset issue
in resume) calls imx_sata_phy_reset() to reset phy immediately after
SATA MPLL is enabled.  It seems working fine mostly, but fails in some
case as below.

...
ahci-imx 2200000.sata: failed to reset phy: -110
ahci-imx: probe of 2200000.sata failed with error -110

After talking to the designer, we learnt that when enabling i.MX6Q SATA
MPLL, we need to wait 100us for it to settle down for safety.  Add this
required delay to fix above failure.

Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit 3685f2516116c5f3b9d498d531955ad70216ad84)

diff --git a/drivers/ata/ahci_imx.c b/drivers/ata/ahci_imx.c
index ced8b1a4c267e42dc76aa6b606ea16534b0777dd..3a901520c62bdacf7eec01af48abc21526ccc2c3 100644 (file)
--- a/drivers/ata/ahci_imx.c
+++ b/drivers/ata/ahci_imx.c
@@ -258,6 +258,8 @@ static int imx_sata_enable(struct ahci_host_priv *hpriv)
                                   IMX6Q_GPR13_SATA_MPLL_CLK_EN,
                                   IMX6Q_GPR13_SATA_MPLL_CLK_EN);
 
+               usleep_range(100, 200);
+
                ret = imx_sata_phy_reset(hpriv);
                if (ret) {
                        dev_err(dev, "failed to reset phy: %d\n", ret);