In other MVEBU SoCs, the pin controller node is called pin-ctrl with
its base address added. Also, we have a node alias to access the pinctrl
node easily. Fix this for Armada XP pinctrl nodes to be consistent with
other SoCs.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-By: Benoit Masson <yahoo@perenite.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
};
internal-regs {
- pinctrl {
+ pinctrl: pin-ctrl@18000 {
pinctrl-0 = <&pmx_phy_int>;
pinctrl-names = "default";
};
internal-regs {
- pinctrl {
+ pinctrl: pin-ctrl@18000 {
poweroff_pin: poweroff-pin {
marvell,pins = "mpp24";
marvell,function = "gpio";
};
internal-regs {
- pinctrl {
+ pinctrl: pin-ctrl@18000 {
compatible = "marvell,mv78230-pinctrl";
};
};
internal-regs {
- pinctrl {
+ pinctrl: pin-ctrl@18000 {
compatible = "marvell,mv78260-pinctrl";
};
};
internal-regs {
- pinctrl {
+ pinctrl: pin-ctrl@18000 {
compatible = "marvell,mv78460-pinctrl";
};
};
internal-regs {
- pinctrl {
+ pinctrl: pin-ctrl@18000 {
poweroff: poweroff {
marvell,pins = "mpp42";
marvell,function = "gpio";
serial@12100 {
status = "okay";
};
- pinctrl {
+ pinctrl: pin-ctrl@18000 {
led_pins: led-pins-0 {
marvell,pins = "mpp49", "mpp51", "mpp53";
marvell,function = "gpio";
status = "disabled";
};
- pinctrl {
+ pinctrl: pin-ctrl@18000 {
reg = <0x18000 0x38>;
sdio_pins: sdio-pins {