ARM: tegra30: common: enable csite clock

Enable csite (debug and trace controller) clock at init to prevent it
be disabled. And this also the necessary clock for CPU be brought up or
resumed from a power-gating low power state.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>

diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
index 6c04a18a88d6937a6b04008a9eaaca29fae34ea8..35b7dd3c926b59cd88be8c960542f39314e8ac38 100644 (file)
--- a/arch/arm/mach-tegra/common.c
+++ b/arch/arm/mach-tegra/common.c
@@ -108,6 +108,7 @@ static __initdata struct tegra_clk_init_table tegra30_clk_init_table[] = {
        { "sclk",       "pll_p_out4",   102000000,      true },
        { "hclk",       "sclk",         102000000,      true },
        { "pclk",       "hclk",         51000000,       true },
+       { "csite",      NULL,           0,              true },
        { NULL,         NULL,           0,              0},
 };
 #endif