if ((priv->byRFType == RF_VT3226) ||
(priv->byRFType == RF_VT3342A0)) {
- ControlvWriteByte(priv, MESSAGE_REQUEST_MACREG,
+ vnt_control_out_u8(priv, MESSAGE_REQUEST_MACREG,
MAC_REG_ITRTMSET, 0x23);
MACvRegBitsOn(priv, MAC_REG_PAPEDELAY, 0x01);
} else if (priv->byRFType == RF_VT3226D0) {
- ControlvWriteByte(priv, MESSAGE_REQUEST_MACREG,
+ vnt_control_out_u8(priv, MESSAGE_REQUEST_MACREG,
MAC_REG_ITRTMSET, 0x11);
MACvRegBitsOn(priv, MAC_REG_PAPEDELAY, 0x01);
}
- ControlvWriteByte(priv, MESSAGE_REQUEST_BBREG, 0x04, 0x7f);
- ControlvWriteByte(priv, MESSAGE_REQUEST_BBREG, 0x0d, 0x01);
+ vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x04, 0x7f);
+ vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x0d, 0x01);
RFbRFTableDownload(priv);
if (bb_vga == priv->abyBBVGA[0])
priv->byBBRxConf |= 0x20;
- ControlvWriteByte(priv, MESSAGE_REQUEST_BBREG, 0x0a, priv->byBBRxConf);
+ vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x0a, priv->byBBRxConf);
}
void BBvSetVGAGainOffset(struct vnt_private *priv, u8 data)
{
- ControlvWriteByte(priv, MESSAGE_REQUEST_BBREG, 0xE7, data);
+ vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0xE7, data);
/* patch for 3253B0 Baseband with Cardbus module */
if (priv->bShortSlotTime)
else
priv->byBBRxConf |= 0x20; /* 0010 0000 */
- ControlvWriteByte(priv, MESSAGE_REQUEST_BBREG, 0x0a, priv->byBBRxConf);
+ vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x0a, priv->byBBRxConf);
}
/*
*/
void BBvSetDeepSleep(struct vnt_private *priv)
{
- ControlvWriteByte(priv, MESSAGE_REQUEST_BBREG, 0x0c, 0x17);/* CR12 */
- ControlvWriteByte(priv, MESSAGE_REQUEST_BBREG, 0x0d, 0xB9);/* CR13 */
+ vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x0c, 0x17);/* CR12 */
+ vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x0d, 0xB9);/* CR13 */
}
void BBvExitDeepSleep(struct vnt_private *priv)
{
- ControlvWriteByte(priv, MESSAGE_REQUEST_BBREG, 0x0c, 0x00);/* CR12 */
- ControlvWriteByte(priv, MESSAGE_REQUEST_BBREG, 0x0d, 0x01);/* CR13 */
+ vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x0c, 0x00);/* CR12 */
+ vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x0d, 0x01);/* CR13 */
}
void BBvUpdatePreEDThreshold(struct vnt_private *priv, int scanning)
if (!cr_201 && !cr_206)
return;
- ControlvWriteByte(priv, MESSAGE_REQUEST_BBREG, 0xc9, cr_201);
- ControlvWriteByte(priv, MESSAGE_REQUEST_BBREG, 0xce, cr_206);
+ vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0xc9, cr_201);
+ vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0xce, cr_206);
}
priv->abyCCKPwrTbl[connection_channel-1], RATE_1M);
}
- ControlvWriteByte(priv, MESSAGE_REQUEST_MACREG, MAC_REG_CHANNEL,
+ vnt_control_out_u8(priv, MESSAGE_REQUEST_MACREG, MAC_REG_CHANNEL,
(u8)(connection_channel|0x80));
}
priv->byPacketType = CARDbyGetPktType(priv);
if (priv->byBBType == BB_TYPE_11A)
- ControlvWriteByte(priv, MESSAGE_REQUEST_BBREG, 0x88, 0x03);
+ vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x88, 0x03);
else if (priv->byBBType == BB_TYPE_11B)
- ControlvWriteByte(priv, MESSAGE_REQUEST_BBREG, 0x88, 0x02);
+ vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x88, 0x02);
else if (priv->byBBType == BB_TYPE_11G)
- ControlvWriteByte(priv, MESSAGE_REQUEST_BBREG, 0x88, 0x08);
+ vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x88, 0x08);
vUpdateIFS(priv);
CARDvSetRSPINF(priv, (u8)priv->byBBType);
if (priv->byRFType == RF_AIROHA7230) {
priv->abyBBVGA[0] = 0x20;
- ControlvWriteByte(priv, MESSAGE_REQUEST_BBREG,
+ vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG,
0xe7, priv->abyBBVGA[0]);
}
if (priv->byRFType == RF_AIROHA7230) {
priv->abyBBVGA[0] = 0x1c;
- ControlvWriteByte(priv, MESSAGE_REQUEST_BBREG,
+ vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG,
0xe7, priv->abyBBVGA[0]);
}
*
* Functions:
* vnt_control_out - Write variable length bytes to MEM/BB/MAC/EEPROM
- * ControlvWriteByte - Write one byte to MEM/BB/MAC/EEPROM
* ControlvReadByte - Read one byte from MEM/BB/MAC/EEPROM
* ControlvMaskByte - Read one byte from MEM/BB/MAC/EEPROM and clear/set
* some bits in the same address
/* static int msglevel =MSG_LEVEL_INFO; */
/* static int msglevel =MSG_LEVEL_DEBUG; */
-void ControlvWriteByte(struct vnt_private *pDevice, u8 reg, u8 reg_off,
- u8 data)
-{
-
- vnt_control_out(pDevice, MESSAGE_TYPE_WRITE, reg_off, reg,
- sizeof(u8), &data);
-
- return;
-}
-
void ControlvReadByte(struct vnt_private *pDevice, u8 reg, u8 reg_off,
u8 *data)
{
#include "device.h"
#include "usbpipe.h"
-void ControlvWriteByte(struct vnt_private *pDevice, u8 reg, u8 reg_off,
- u8 data);
-
void ControlvReadByte(struct vnt_private *pDevice, u8 reg, u8 reg_off,
u8 *data);
byCalibRXIQ = pDevice->abyEEPROM[EEP_OFS_CALIB_RX_IQ];
if (byCalibTXIQ || byCalibTXDC || byCalibRXIQ) {
/* CR255, enable TX/RX IQ and DC compensation mode */
- ControlvWriteByte(pDevice,
+ vnt_control_out_u8(pDevice,
MESSAGE_REQUEST_BBREG,
0xff,
0x03);
/* CR251, TX I/Q Imbalance Calibration */
- ControlvWriteByte(pDevice,
+ vnt_control_out_u8(pDevice,
MESSAGE_REQUEST_BBREG,
0xfb,
byCalibTXIQ);
/* CR252, TX DC-Offset Calibration */
- ControlvWriteByte(pDevice,
+ vnt_control_out_u8(pDevice,
MESSAGE_REQUEST_BBREG,
0xfC,
byCalibTXDC);
/* CR253, RX I/Q Imbalance Calibration */
- ControlvWriteByte(pDevice,
+ vnt_control_out_u8(pDevice,
MESSAGE_REQUEST_BBREG,
0xfd,
byCalibRXIQ);
} else {
/* CR255, turn off BB Calibration compensation */
- ControlvWriteByte(pDevice,
+ vnt_control_out_u8(pDevice,
MESSAGE_REQUEST_BBREG,
0xff,
0x0);
priv->byRxMode &= ~(RCR_UNICAST);
}
- ControlvWriteByte(priv, MESSAGE_REQUEST_MACREG,
+ vnt_control_out_u8(priv, MESSAGE_REQUEST_MACREG,
MAC_REG_RCR, priv->byRxMode);
DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO
* Functions:
* vnt_control_out - Write variable length bytes to MEM/BB/MAC/EEPROM
* vnt_control_in - Read variable length bytes from MEM/BB/MAC/EEPROM
- * ControlvWriteByte - Write one byte to MEM/BB/MAC/EEPROM
+ * vnt_control_out_u8 - Write one byte to MEM/BB/MAC/EEPROM
* ControlvReadByte - Read one byte from MEM/BB/MAC/EEPROM
* ControlvMaskByte - Read one byte from MEM/BB/MAC/EEPROM and clear/set some bits in the same address
*
return STATUS_SUCCESS;
}
+void vnt_control_out_u8(struct vnt_private *priv, u8 reg, u8 reg_off, u8 data)
+{
+ vnt_control_out(priv, MESSAGE_TYPE_WRITE,
+ reg_off, reg, sizeof(u8), &data);
+}
+
int vnt_control_in(struct vnt_private *priv, u8 request, u16 value,
u16 index, u16 length, u8 *buffer)
{
int vnt_control_out(struct vnt_private *, u8, u16, u16, u16, u8 *);
int vnt_control_in(struct vnt_private *, u8, u16, u16, u16, u8 *);
+void vnt_control_out_u8(struct vnt_private *, u8, u8, u8);
+
int PIPEnsInterruptRead(struct vnt_private *);
int PIPEnsBulkInUsbRead(struct vnt_private *, struct vnt_rcb *pRCB);
int PIPEnsSendBulkOut(struct vnt_private *,