arm64: dts: juno: Add idle-states to device tree

This patch adds idle-states bindings data collected through a set of
benchmarking experiments (latency and energy consumption) on Juno
boards. Latencies data represents the worst case scenarios as required
by the DT idle-states bindings.

Signed-off-by: Jon Medhurst <tixy@linaro.org>
Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Olof Johansson <olof@lixom.net>

diff --git a/arch/arm64/boot/dts/arm/juno-r1.dts b/arch/arm64/boot/dts/arm/juno-r1.dts
index 93bc3d7d51c0f32f6894e9210ef9f41df3913e0a..8826f834f54f25ca1b1912e9903af68d8c37453b 100644 (file)
--- a/arch/arm64/boot/dts/arm/juno-r1.dts
+++ b/arch/arm64/boot/dts/arm/juno-r1.dts
@@ -60,6 +60,28 @@
                        };
                };
 
+               idle-states {
+                       entry-method = "arm,psci";
+
+                       CPU_SLEEP_0: cpu-sleep-0 {
+                               compatible = "arm,idle-state";
+                               arm,psci-suspend-param = <0x0010000>;
+                               local-timer-stop;
+                               entry-latency-us = <300>;
+                               exit-latency-us = <1200>;
+                               min-residency-us = <2000>;
+                       };
+
+                       CLUSTER_SLEEP_0: cluster-sleep-0 {
+                               compatible = "arm,idle-state";
+                               arm,psci-suspend-param = <0x1010000>;
+                               local-timer-stop;
+                               entry-latency-us = <300>;
+                               exit-latency-us = <1200>;
+                               min-residency-us = <2500>;
+                       };
+               };
+
                A57_0: cpu@0 {
                        compatible = "arm,cortex-a57","arm,armv8";
                        reg = <0x0 0x0>;
@@ -67,6 +89,7 @@
                        enable-method = "psci";
                        next-level-cache = <&A57_L2>;
                        clocks = <&scpi_dvfs 0>;
+                       cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
                };
 
                A57_1: cpu@1 {
@@ -76,6 +99,7 @@
                        enable-method = "psci";
                        next-level-cache = <&A57_L2>;
                        clocks = <&scpi_dvfs 0>;
+                       cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
                };
 
                A53_0: cpu@100 {
@@ -85,6 +109,7 @@
                        enable-method = "psci";
                        next-level-cache = <&A53_L2>;
                        clocks = <&scpi_dvfs 1>;
+                       cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
                };
 
                A53_1: cpu@101 {
@@ -94,6 +119,7 @@
                        enable-method = "psci";
                        next-level-cache = <&A53_L2>;
                        clocks = <&scpi_dvfs 1>;
+                       cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
                };
 
                A53_2: cpu@102 {
@@ -103,6 +129,7 @@
                        enable-method = "psci";
                        next-level-cache = <&A53_L2>;
                        clocks = <&scpi_dvfs 1>;
+                       cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
                };
 
                A53_3: cpu@103 {
@@ -112,6 +139,7 @@
                        enable-method = "psci";
                        next-level-cache = <&A53_L2>;
                        clocks = <&scpi_dvfs 1>;
+                       cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
                };
 
                A57_L2: l2-cache0 {

diff --git a/arch/arm64/boot/dts/arm/juno.dts b/arch/arm64/boot/dts/arm/juno.dts
index 53442b5ee4ff99170056ddb15eee296461d167a0..dcfcf15a17f5f8e9813e523c337c78c7a9a4ad82 100644 (file)
--- a/arch/arm64/boot/dts/arm/juno.dts
+++ b/arch/arm64/boot/dts/arm/juno.dts
@@ -60,6 +60,28 @@
                        };
                };
 
+               idle-states {
+                       entry-method = "arm,psci";
+
+                       CPU_SLEEP_0: cpu-sleep-0 {
+                               compatible = "arm,idle-state";
+                               arm,psci-suspend-param = <0x0010000>;
+                               local-timer-stop;
+                               entry-latency-us = <300>;
+                               exit-latency-us = <1200>;
+                               min-residency-us = <2000>;
+                       };
+
+                       CLUSTER_SLEEP_0: cluster-sleep-0 {
+                               compatible = "arm,idle-state";
+                               arm,psci-suspend-param = <0x1010000>;
+                               local-timer-stop;
+                               entry-latency-us = <300>;
+                               exit-latency-us = <1200>;
+                               min-residency-us = <2500>;
+                       };
+               };
+
                A57_0: cpu@0 {
                        compatible = "arm,cortex-a57","arm,armv8";
                        reg = <0x0 0x0>;
@@ -67,6 +89,7 @@
                        enable-method = "psci";
                        next-level-cache = <&A57_L2>;
                        clocks = <&scpi_dvfs 0>;
+                       cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
                };
 
                A57_1: cpu@1 {
@@ -76,6 +99,7 @@
                        enable-method = "psci";
                        next-level-cache = <&A57_L2>;
                        clocks = <&scpi_dvfs 0>;
+                       cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
                };
 
                A53_0: cpu@100 {
@@ -85,6 +109,7 @@
                        enable-method = "psci";
                        next-level-cache = <&A53_L2>;
                        clocks = <&scpi_dvfs 1>;
+                       cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
                };
 
                A53_1: cpu@101 {
@@ -94,6 +119,7 @@
                        enable-method = "psci";
                        next-level-cache = <&A53_L2>;
                        clocks = <&scpi_dvfs 1>;
+                       cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
                };
 
                A53_2: cpu@102 {
@@ -103,6 +129,7 @@
                        enable-method = "psci";
                        next-level-cache = <&A53_L2>;
                        clocks = <&scpi_dvfs 1>;
+                       cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
                };
 
                A53_3: cpu@103 {
@@ -112,6 +139,7 @@
                        enable-method = "psci";
                        next-level-cache = <&A53_L2>;
                        clocks = <&scpi_dvfs 1>;
+                       cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
                };
 
                A57_L2: l2-cache0 {