if (sc->pwrsts == PWRSTS_ON)
return gdsc_deassert_reset(sc);
+ if (sc->root_clk)
+ clk_prepare_enable(sc->root_clk);
+
ret = gdsc_toggle_logic(sc, true);
if (ret)
return ret;
static int gdsc_disable(struct generic_pm_domain *domain)
{
+ int ret;
struct gdsc *sc = domain_to_gdsc(domain);
if (sc->pwrsts == PWRSTS_ON)
if (sc->pwrsts & PWRSTS_OFF)
gdsc_clear_mem_on(sc);
- return gdsc_toggle_logic(sc, false);
+ ret = gdsc_toggle_logic(sc, false);
+
+ if (sc->root_clk)
+ clk_disable_unprepare(sc->root_clk);
+
+ return ret;
}
static inline bool match(unsigned int id, unsigned int *ids, unsigned int count)
sc->clks[j] = of_clk_get_from_provider(&clkspec);
pm_clk_add_clk(dev, sc->clks[j]);
j++;
- }
+ } else if (clkspec.args[0] == sc->root_clock)
+ sc->root_clk = of_clk_get_from_provider(&clkspec);
i++;
}
return 0;
* @clocks: ids of clocks associated with the gdsc
* @clock_count: number of @clocks
* @clks: clock pointers to gdsc clocks
+ * @root_clock: id of the root clock to be enabled
+ * @root_clk: root clk pointer
*/
struct gdsc {
struct generic_pm_domain pd;
unsigned int *clocks;
unsigned int clock_count;
struct clk **clks;
+ unsigned int root_clock;
+ struct clk *root_clk;
};
#ifdef CONFIG_QCOM_GDSC