ARM: dts: imx6qdl-sabrelite: move USDHC4 CD to pinctrl_usdhc4

This patch moves pin NANDF_D6 (CD) from pinctrl_hog to pinctrl_usdhc4.
It also explicitly sets the pad to 0x1b0b0, which is also the value
that it has before this patch if using mainline u-boot.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
index 5394e02731cd409a5dc5ee63ed4178f7b8b7a6ae..8bb910b275b408f5d930892a055b2a82fcb92362 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
@@ -114,7 +114,6 @@
        imx6q-sabrelite {
                pinctrl_hog: hoggrp {
                        fsl,pins = <
-                               MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x80000000
                                MX6QDL_PAD_EIM_D19__GPIO3_IO19  0x80000000
                                MX6QDL_PAD_EIM_D22__GPIO3_IO22  0x80000000
                                MX6QDL_PAD_EIM_D23__GPIO3_IO23  0x80000000
@@ -157,7 +156,10 @@
                };
 
                pinctrl_usdhc4: usdhc4grp {
-                       fsl,pins = <MX6QDL_USDHC4_PINGRP_D4>;
+                       fsl,pins = <
+                               MX6QDL_USDHC4_PINGRP_D4
+                               MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0 /* CD */
+                       >;
                };
        };
 };