ARM: dts: rockchip: set a sane frequence for tsadc on rk322x

Update freq of tsadc's working clock as 32768 hz, if not set, tsadc
will work at a default frequence.

Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
index c09e17cc4ab0cc4b613f9deb4f44af26bfd09ead..df574135797a545fde408af006effb2c510a6802 100644 (file)
--- a/arch/arm/boot/dts/rk322x.dtsi
+++ b/arch/arm/boot/dts/rk322x.dtsi
@@ -434,6 +434,8 @@
                interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
                clock-names = "tsadc", "apb_pclk";
+               assigned-clocks = <&cru SCLK_TSADC>;
+               assigned-clock-rates = <32768>;
                resets = <&cru SRST_TSADC>;
                reset-names = "tsadc-apb";
                pinctrl-names = "init", "default", "sleep";