]> git.karo-electronics.de Git - linux-beck.git/commitdiff
[media] v4l: Add 8-bit YUYV on 16-bit bus and SGRBG10 media bus pixel codes
authorLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Wed, 1 Sep 2010 15:59:36 +0000 (12:59 -0300)
committerMauro Carvalho Chehab <mchehab@redhat.com>
Tue, 22 Mar 2011 07:53:35 +0000 (04:53 -0300)
Add the following media bus format code definitions:

- V4L2_MBUS_FMT_SGRBG10_1X10 for 10-bit GRBG Bayer
- V4L2_MBUS_FMT_SGRBG10_DPCM8_1X8 for 10-bit DPCM compressed GRBG Bayer
- V4L2_MBUS_FMT_YUYV16_1X16 for 8-bit YUYV on 16-bit bus
- V4L2_MBUS_FMT_UYVY16_1X16 for 8-bit UYVY on 16-bit bus
- V4L2_MBUS_FMT_YVYU16_1X16 for 8-bit YVYU on 16-bit bus
- V4L2_MBUS_FMT_VYUY16_1X16 for 8-bit VYUY on 16-bit bus

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Hans Verkuil <hverkuil@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
include/linux/v4l2-mediabus.h

index cccfa34bab1f4e5e1f8f9725c1379da02c7de6b1..c4caca33e0c6f2a8c886030be2a694936fd6f7e9 100644 (file)
@@ -47,7 +47,7 @@ enum v4l2_mbus_pixelcode {
        V4L2_MBUS_FMT_RGB565_2X8_BE = 0x1007,
        V4L2_MBUS_FMT_RGB565_2X8_LE = 0x1008,
 
-       /* YUV (including grey) - next is 0x200f */
+       /* YUV (including grey) - next is 0x2013 */
        V4L2_MBUS_FMT_Y8_1X8 = 0x2001,
        V4L2_MBUS_FMT_UYVY8_1_5X8 = 0x2002,
        V4L2_MBUS_FMT_VYUY8_1_5X8 = 0x2003,
@@ -60,17 +60,23 @@ enum v4l2_mbus_pixelcode {
        V4L2_MBUS_FMT_Y10_1X10 = 0x200a,
        V4L2_MBUS_FMT_YUYV10_2X10 = 0x200b,
        V4L2_MBUS_FMT_YVYU10_2X10 = 0x200c,
+       V4L2_MBUS_FMT_UYVY8_1X16 = 0x200f,
+       V4L2_MBUS_FMT_VYUY8_1X16 = 0x2010,
+       V4L2_MBUS_FMT_YUYV8_1X16 = 0x2011,
+       V4L2_MBUS_FMT_YVYU8_1X16 = 0x2012,
        V4L2_MBUS_FMT_YUYV10_1X20 = 0x200d,
        V4L2_MBUS_FMT_YVYU10_1X20 = 0x200e,
 
-       /* Bayer - next is 0x3009 */
+       /* Bayer - next is 0x300b */
        V4L2_MBUS_FMT_SBGGR8_1X8 = 0x3001,
        V4L2_MBUS_FMT_SGRBG8_1X8 = 0x3002,
+       V4L2_MBUS_FMT_SGRBG10_DPCM8_1X8 = 0x3009,
        V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_BE = 0x3003,
        V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE = 0x3004,
        V4L2_MBUS_FMT_SBGGR10_2X8_PADLO_BE = 0x3005,
        V4L2_MBUS_FMT_SBGGR10_2X8_PADLO_LE = 0x3006,
        V4L2_MBUS_FMT_SBGGR10_1X10 = 0x3007,
+       V4L2_MBUS_FMT_SGRBG10_1X10 = 0x300a,
        V4L2_MBUS_FMT_SBGGR12_1X12 = 0x3008,
 };