ARM: dts: ifc6410: enable pcie dt node for this board

Enable pcie dt node and fill pcie dt node with regulator, pinctrl
and reset gpio, to use the pcie on the ifc6410 board.

Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>

diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
index aa9303b84d67f1da0c22ab49af5732c347f7f9d9..267f75ded63b70a8dba6c496842dc4ebb72c46bf 100644 (file)
--- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
@@ -47,6 +47,18 @@
                                        bias-disable;
                                };
                        };
+
+                       pcie_pins: pcie_pinmux {
+                               mux {
+                                       pins = "gpio27";
+                                       function = "gpio";
+                               };
+                               conf {
+                                       pins = "gpio27";
+                                       drive-strength = <12>;
+                                       bias-disable;
+                               };
+                       };
                };
 
                rpm@108000 {
@@ -123,6 +135,10 @@
                                lvs1 {
                                        bias-pull-down;
                                };
+
+                               pm8921_lvs6: lvs6 {
+                                       bias-pull-down;
+                               };
                        };
                };
 
@@ -231,6 +247,16 @@
                        status = "okay";
                };
 
+               pci@1b500000 {
+                       status = "ok";
+                       vdda-supply = <&pm8921_s3>;
+                       vdda_phy-supply = <&pm8921_lvs6>;
+                       vdda_refclk-supply = <&ext_3p3v>;
+                       pinctrl-0 = <&pcie_pins>;
+                       pinctrl-names = "default";
+                       perst-gpio = <&tlmm_pinmux 27 GPIO_ACTIVE_LOW>;
+               };
+
                qcom,ssbi@500000 {
                        pmic@0 {
                                gpio@150 {