drm/i915: Use true PPGTT in Gen8+ when execlists are enabled

In Gen8+, full ppgtt needs execlist, otherwise the ctx switch can hang.

Also remove the current restriction, a user should be able to explicitly set
ppgtt=2.

Note, this patch considers that execlist support has been enabled by
default on Gen8.

v2: Remove non-default restriction and clarify commit message (Daniel)

Cc: Daniel Vetter <daniel@ffwll.ch>
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
[danvet: s/comment/commit message/ in the commit message since that's
what Michel meant as per our irc discussion.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index cc3056f2c7f4a69fae52ef68dde74dbb8ee686af..75a29a3822089da48ecb37e179ce7b4050853ce1 100644 (file)
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -102,8 +102,6 @@ static int sanitize_enable_ppgtt(struct drm_device *dev, int enable_ppgtt)
 
        has_aliasing_ppgtt = INTEL_INFO(dev)->gen >= 6;
        has_full_ppgtt = INTEL_INFO(dev)->gen >= 7;
-       if (IS_GEN8(dev))
-               has_full_ppgtt = false; /* XXX why? */
 
        /*
         * We don't allow disabling PPGTT for gen9+ as it's a requirement for
@@ -134,7 +132,10 @@ static int sanitize_enable_ppgtt(struct drm_device *dev, int enable_ppgtt)
                return 0;
        }
 
-       return has_aliasing_ppgtt ? 1 : 0;
+       if (INTEL_INFO(dev)->gen >= 8 && i915.enable_execlists)
+               return 2;
+       else
+               return has_aliasing_ppgtt ? 1 : 0;
 }