ENGR00222834 MX6x-A9 prefetcher should not access DDR before IO is restored

Add enough nops to suspend code when exiting due to a pending
interrupt. This is required so that we can guarantee that the
prefetch unit will not bring DDR out of self-refresh before
all of the DDR's IO pads are restored.

Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>

diff --git a/arch/arm/mach-mx6/mx6_suspend.S b/arch/arm/mach-mx6/mx6_suspend.S
index 0b9dc57b009136553a6bd0d9f797e3e7bc6fe036..0533ad1b20effa9f77dbc2d6ff2f4429537da181 100644 (file)
--- a/arch/arm/mach-mx6/mx6_suspend.S
+++ b/arch/arm/mach-mx6/mx6_suspend.S
@@ -884,6 +884,40 @@ sl_io_restore:
        sl_ddr_io_restore
 
 ddr_io_restore_done:
+       /* Add enough nops so that the
+         * prefetcher will not get instructions
+         * from DDR before its IO pads
+         * are restored.
+         */
+       nop
+       nop
+       nop
+       nop
+       nop
+
+       nop
+       nop
+       nop
+       nop
+       nop
+
+       nop
+       nop
+       nop
+       nop
+       nop
+
+       nop
+       nop
+       nop
+       nop
+       nop
+
+       nop
+       nop
+       nop
+       nop
+       nop
 
        mrc     p15, 0, r1, c1, c0, 0
        orr     r1, r1, #(1 << 2)       @ Enable the C bit