]> git.karo-electronics.de Git - mv-sheeva.git/commitdiff
drm/i915/overlay: Move capabilities bits to common info block.
authorChris Wilson <chris@chris-wilson.co.uk>
Thu, 12 Aug 2010 08:42:51 +0000 (09:42 +0100)
committerChris Wilson <chris@chris-wilson.co.uk>
Wed, 8 Sep 2010 09:23:42 +0000 (10:23 +0100)
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_drv.c
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/intel_overlay.c

index 2879a768d65cc9dfe96f080e07201de340753e89..dffc1bcf7b79dc8be66ead1b4e5fac1731ac4724 100644 (file)
@@ -62,49 +62,60 @@ extern int intel_agp_enabled;
 
 static const struct intel_device_info intel_i830_info = {
        .gen = 2, .is_i8xx = 1, .is_mobile = 1, .cursor_needs_physical = 1,
+       .has_overlay = 1, .overlay_needs_physical = 1,
 };
 
 static const struct intel_device_info intel_845g_info = {
        .gen = 2, .is_i8xx = 1,
+       .has_overlay = 1, .overlay_needs_physical = 1,
 };
 
 static const struct intel_device_info intel_i85x_info = {
        .gen = 2, .is_i8xx = 1, .is_i85x = 1, .is_mobile = 1,
        .cursor_needs_physical = 1,
+       .has_overlay = 1, .overlay_needs_physical = 1,
 };
 
 static const struct intel_device_info intel_i865g_info = {
        .gen = 2, .is_i8xx = 1,
+       .has_overlay = 1, .overlay_needs_physical = 1,
 };
 
 static const struct intel_device_info intel_i915g_info = {
        .gen = 3, .is_i915g = 1, .is_i9xx = 1, .cursor_needs_physical = 1,
+       .has_overlay = 1, .overlay_needs_physical = 1,
 };
 static const struct intel_device_info intel_i915gm_info = {
        .gen = 3, .is_i9xx = 1,  .is_mobile = 1,
        .cursor_needs_physical = 1,
+       .has_overlay = 1, .overlay_needs_physical = 1,
 };
 static const struct intel_device_info intel_i945g_info = {
        .gen = 3, .is_i9xx = 1, .has_hotplug = 1, .cursor_needs_physical = 1,
+       .has_overlay = 1, .overlay_needs_physical = 1,
 };
 static const struct intel_device_info intel_i945gm_info = {
        .gen = 3, .is_i945gm = 1, .is_i9xx = 1, .is_mobile = 1,
        .has_hotplug = 1, .cursor_needs_physical = 1,
+       .has_overlay = 1, .overlay_needs_physical = 1,
 };
 
 static const struct intel_device_info intel_i965g_info = {
        .gen = 4, .is_broadwater = 1, .is_i965g = 1, .is_i9xx = 1,
        .has_hotplug = 1,
+       .has_overlay = 1,
 };
 
 static const struct intel_device_info intel_i965gm_info = {
        .gen = 4, .is_crestline = 1, .is_i965g = 1, .is_i965gm = 1, .is_i9xx = 1,
        .is_mobile = 1, .has_fbc = 1, .has_rc6 = 1, .has_hotplug = 1,
+       .has_overlay = 1,
 };
 
 static const struct intel_device_info intel_g33_info = {
        .gen = 3, .is_g33 = 1, .is_i9xx = 1,
        .need_gfx_hws = 1, .has_hotplug = 1,
+       .has_overlay = 1,
 };
 
 static const struct intel_device_info intel_g45_info = {
@@ -121,6 +132,7 @@ static const struct intel_device_info intel_gm45_info = {
 static const struct intel_device_info intel_pineview_info = {
        .gen = 3, .is_g33 = 1, .is_pineview = 1, .is_mobile = 1, .is_i9xx = 1,
        .need_gfx_hws = 1, .has_hotplug = 1,
+       .has_overlay = 1,
 };
 
 static const struct intel_device_info intel_ironlake_d_info = {
index f983130a702dc45633dc899df8e7da5fe1abec38..10c9e416c96b23e9e0ac22008e7dc2470c4e277d 100644 (file)
@@ -213,6 +213,8 @@ struct intel_device_info {
        u8 has_pipe_cxsr : 1;
        u8 has_hotplug : 1;
        u8 cursor_needs_physical : 1;
+       u8 has_overlay : 1;
+       u8 overlay_needs_physical : 1;
 };
 
 enum no_fbc_reason {
@@ -1218,6 +1220,9 @@ static inline void i915_write(struct drm_i915_private *dev_priv, u32 reg,
 #define HAS_BSD(dev)            (IS_IRONLAKE(dev) || IS_G4X(dev))
 #define I915_NEED_GFX_HWS(dev) (INTEL_INFO(dev)->need_gfx_hws)
 
+#define HAS_OVERLAY(dev)               (INTEL_INFO(dev)->has_overlay)
+#define OVERLAY_NEEDS_PHYSICAL(dev)    (INTEL_INFO(dev)->overlay_needs_physical)
+
 /* With the 945 and later, Y tiling got adjusted so that it was 32 128-byte
  * rows, which changed the alignment requirements and fence programming.
  */
index fef4dd61dcfd2c0bbdd6e19faef6112238d27f27..df5277aaa98b53918baef649250ee87cc46cdf23 100644 (file)
@@ -173,9 +173,6 @@ struct overlay_registers {
 /* overlay flip addr flag */
 #define OFC_UPDATE             0x1
 
-#define OVERLAY_NONPHYSICAL(dev) (IS_G33(dev) || IS_I965G(dev))
-#define OVERLAY_EXISTS(dev) (!IS_G4X(dev) && !IS_IRONLAKE(dev) && !IS_GEN6(dev))
-
 static struct overlay_registers *intel_overlay_map_regs_atomic(struct intel_overlay *overlay)
 {
         drm_i915_private_t *dev_priv = overlay->dev->dev_private;
@@ -184,7 +181,9 @@ static struct overlay_registers *intel_overlay_map_regs_atomic(struct intel_over
        /* no recursive mappings */
        BUG_ON(overlay->virt_addr);
 
-       if (OVERLAY_NONPHYSICAL(overlay->dev)) {
+       if (OVERLAY_NEEDS_PHYSICAL(overlay->dev)) {
+               regs = overlay->reg_bo->phys_obj->handle->vaddr;
+       } else {
                regs = io_mapping_map_atomic_wc(dev_priv->mm.gtt_mapping,
                                                overlay->reg_bo->gtt_offset,
                                                KM_USER0);
@@ -193,15 +192,14 @@ static struct overlay_registers *intel_overlay_map_regs_atomic(struct intel_over
                        DRM_ERROR("failed to map overlay regs in GTT\n");
                        return NULL;
                }
-       } else
-               regs = overlay->reg_bo->phys_obj->handle->vaddr;
+       }
 
        return overlay->virt_addr = regs;
 }
 
 static void intel_overlay_unmap_regs_atomic(struct intel_overlay *overlay)
 {
-       if (OVERLAY_NONPHYSICAL(overlay->dev))
+       if (!OVERLAY_NEEDS_PHYSICAL(overlay->dev))
                io_mapping_unmap_atomic(overlay->virt_addr, KM_USER0);
 
        overlay->virt_addr = NULL;
@@ -1366,7 +1364,7 @@ void intel_setup_overlay(struct drm_device *dev)
        struct overlay_registers *regs;
        int ret;
 
-       if (!OVERLAY_EXISTS(dev))
+       if (!HAS_OVERLAY(dev))
                return;
 
        overlay = kzalloc(sizeof(struct intel_overlay), GFP_KERNEL);
@@ -1379,7 +1377,16 @@ void intel_setup_overlay(struct drm_device *dev)
                goto out_free;
        overlay->reg_bo = to_intel_bo(reg_bo);
 
-       if (OVERLAY_NONPHYSICAL(dev)) {
+       if (OVERLAY_NEEDS_PHYSICAL(dev)) {
+               ret = i915_gem_attach_phys_object(dev, reg_bo,
+                                                 I915_GEM_PHYS_OVERLAY_REGS,
+                                                 0);
+                if (ret) {
+                        DRM_ERROR("failed to attach phys overlay regs\n");
+                        goto out_free_bo;
+                }
+               overlay->flip_addr = overlay->reg_bo->phys_obj->handle->busaddr;
+       } else {
                ret = i915_gem_object_pin(reg_bo, PAGE_SIZE);
                if (ret) {
                         DRM_ERROR("failed to pin overlay register bo\n");
@@ -1392,15 +1399,6 @@ void intel_setup_overlay(struct drm_device *dev)
                         DRM_ERROR("failed to move overlay register bo into the GTT\n");
                         goto out_unpin_bo;
                 }
-       } else {
-               ret = i915_gem_attach_phys_object(dev, reg_bo,
-                                                 I915_GEM_PHYS_OVERLAY_REGS,
-                                                 0);
-                if (ret) {
-                        DRM_ERROR("failed to attach phys overlay regs\n");
-                        goto out_free_bo;
-                }
-               overlay->flip_addr = overlay->reg_bo->phys_obj->handle->busaddr;
        }
 
        /* init all values */
@@ -1471,10 +1469,10 @@ intel_overlay_capture_error_state(struct drm_device *dev)
 
        error->dovsta = I915_READ(DOVSTA);
        error->isr = I915_READ(ISR);
-       if (OVERLAY_NONPHYSICAL(overlay->dev))
-               error->base = (long) overlay->reg_bo->gtt_offset;
-       else
+       if (OVERLAY_NEEDS_PHYSICAL(overlay->dev))
                error->base = (long) overlay->reg_bo->phys_obj->handle->vaddr;
+       else
+               error->base = (long) overlay->reg_bo->gtt_offset;
 
        regs = intel_overlay_map_regs_atomic(overlay);
        if (!regs)