ARM: at91/dt: at91sam9x5: Add CAN device nodes

Add the missing CAN devices node including their pin muxing to the shared
.dtsi for at91sam9x5. Actually include this file.

Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>

diff --git a/arch/arm/boot/dts/at91sam9x25.dtsi b/arch/arm/boot/dts/at91sam9x25.dtsi
index c2554219f7a4eb736c2f46f6ce36175311d5d530..3c5fa3388997078dd206dfb5cb05a35a1752e963 100644 (file)
--- a/arch/arm/boot/dts/at91sam9x25.dtsi
+++ b/arch/arm/boot/dts/at91sam9x25.dtsi
@@ -10,6 +10,7 @@
 #include "at91sam9x5_usart3.dtsi"
 #include "at91sam9x5_macb0.dtsi"
 #include "at91sam9x5_macb1.dtsi"
+#include "at91sam9x5_can.dtsi"
 
 / {
        model = "Atmel AT91SAM9X25 SoC";

diff --git a/arch/arm/boot/dts/at91sam9x35.dtsi b/arch/arm/boot/dts/at91sam9x35.dtsi
index 8eac66ce0ab7766f76476d836488f7374f1b4a90..499cdc81f4c07ce352a92a3c0bb1a7029b8c98ea 100644 (file)
--- a/arch/arm/boot/dts/at91sam9x35.dtsi
+++ b/arch/arm/boot/dts/at91sam9x35.dtsi
@@ -8,6 +8,7 @@
 
 #include "at91sam9x5.dtsi"
 #include "at91sam9x5_macb0.dtsi"
+#include "at91sam9x5_can.dtsi"
 
 / {
        model = "Atmel AT91SAM9X35 SoC";

diff --git a/arch/arm/boot/dts/at91sam9x5_can.dtsi b/arch/arm/boot/dts/at91sam9x5_can.dtsi
index ebe4147529bbab08ec1fcb8413385de0cb83ca10..8eb2f9c1b97847d94db2cf58b57f5c82b423832f 100644 (file)
--- a/arch/arm/boot/dts/at91sam9x5_can.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5_can.dtsi
@@ -26,6 +26,46 @@
                                        };
                                };
                        };
+
+                       can0: can@f8000000 {
+                               compatible = "atmel,at91sam9x5-can";
+                               reg = <0xf8000000 0x300>;
+                               interrupts = <29 IRQ_TYPE_LEVEL_HIGH 3>;
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&pinctrl_can0_rx_tx>;
+                               clocks = <&can0_clk>;
+                               clock-names = "can_clk";
+                               status = "disabled";
+                       };
+
+                       can1: can@f8004000 {
+                               compatible = "atmel,at91sam9x5-can";
+                               reg = <0xf8004000 0x300>;
+                               interrupts = <30 IRQ_TYPE_LEVEL_HIGH 3>;
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&pinctrl_can1_rx_tx>;
+                               clocks = <&can1_clk>;
+                               clock-names = "can_clk";
+                               status = "disabled";
+                       };
+
+                       pinctrl@fffff400 {
+                               can0 {
+                                       pinctrl_can0_rx_tx: can0_rx_tx {
+                                               atmel,pins =
+                                                       <AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE    /* CANRX0, conflicts with DRXD */
+                                                       AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* CANTX0, conflicts with DTXD */
+                                       };
+                               };
+
+                               can1 {
+                                       pinctrl_can1_rx_tx: can1_rx_tx {
+                                               atmel,pins =
+                                                       <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE    /* CANRX1, conflicts with RXD1 */
+                                                       AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;   /* CANTX1, conflicts with TXD1 */
+                                       };
+                               };
+                       };
                };
        };
 };