gcmkERR_BREAK(gckOS_WaitSignal(
command->os,
command->powerStallSignal,
- gcvINFINITE));
+ gcdGPU_TIMEOUT));
}
if (flag & (gcvPOWER_FLAG_INITIALIZE | gcvPOWER_FLAG_CLOCK_ON))
{
/* Turn on the power. */
- gcmkONERROR(gckOS_SetGPUPower(os, gcvCORE_VG , gcvTRUE, gcvTRUE));
+ gcmkONERROR(gckOS_SetGPUPower(os, gcvCORE_VG, gcvTRUE, gcvTRUE));
/* Mark clock and power as enabled. */
Hardware->clockState = gcvTRUE;
index += _State(Context, index, 0x00A38 >> 2, 0x00000000, 1, gcvFALSE, gcvFALSE);
index += _State(Context, index, 0x00A3C >> 2, 0x00000000, 1, gcvFALSE, gcvFALSE);
index += _State(Context, index, 0x00A80 >> 2, 0x00000000, 1, gcvFALSE, gcvFALSE);
- index += _State(Context, index, 0x00A84 >> 2, 0x00000000, 1, gcvFALSE, gcvFALSE);
+ index += _State(Context, index, 0x00A84 >> 2, 0x00000000, 1, gcvTRUE, gcvFALSE);
+ index += _State(Context, index, 0x00A8C >> 2, 0x00000000, 1, gcvFALSE, gcvFALSE);
/* Setup states. */
index += _State(Context, index, 0x00C00 >> 2, 0x00000000, 1, gcvTRUE, gcvFALSE);
}
}
+ /* If new HZ is available, disable other early z modes. */
+ if (((((gctUINT32) (Identity->chipMinorFeatures3)) >> (0 ? 26:26) & ((gctUINT32) ((((1 ? 26:26) - (0 ? 26:26) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 26:26) - (0 ? 26:26) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 26:26) - (0 ? 26:26) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 26:26) - (0 ? 26:26) + 1)))))))
+ || ((((gctUINT32) (Identity->chipMinorFeatures3)) >> (0 ? 8:8) & ((gctUINT32) ((((1 ? 8:8) - (0 ? 8:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:8) - (0 ? 8:8) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 8:8) - (0 ? 8:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:8) - (0 ? 8:8) + 1))))))))
+ {
+ /* Disable EZ. */
+ Identity->chipFeatures
+ = ((((gctUINT32) (Identity->chipFeatures)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1))))))) << (0 ? 16:16))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1))))))) << (0 ? 16:16)));
+ }
+
/* Disable HZ when EZ is present for older chips. */
- if (!((((gctUINT32) (Identity->chipMinorFeatures3)) >> (0 ? 8:8) & ((gctUINT32) ((((1 ? 8:8) - (0 ? 8:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:8) - (0 ? 8:8) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 8:8) - (0 ? 8:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:8) - (0 ? 8:8) + 1)))))))
- &&
- !((((gctUINT32) (Identity->chipFeatures)) >> (0 ? 16:16) & ((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1)))))))
- )
+ else if (!((((gctUINT32) (Identity->chipFeatures)) >> (0 ? 16:16) & ((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1))))))))
{
/* Disable HIERARCHICAL_Z. */
Identity->chipMinorFeatures
= ((((gctUINT32) (Identity->chipMinorFeatures)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:27) - (0 ? 27:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:27) - (0 ? 27:27) + 1))))))) << (0 ? 27:27))) | (((gctUINT32) (0x0 & ((gctUINT32) ((((1 ? 27:27) - (0 ? 27:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:27) - (0 ? 27:27) + 1))))))) << (0 ? 27:27)));
}
+
/* Disable rectangle primitive when chip is gc880_5_1_0_rc6*/
if ((Identity->chipModel == gcv880) && (Identity->chipRevision == 0x5106))
{
Identity->chipMinorFeatures2
= ((((gctUINT32) (Identity->chipMinorFeatures2)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 5:5) - (0 ? 5:5) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 5:5) - (0 ? 5:5) + 1))))))) << (0 ? 5:5))) | (((gctUINT32) (0x0 & ((gctUINT32) ((((1 ? 5:5) - (0 ? 5:5) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 5:5) - (0 ? 5:5) + 1))))))) << (0 ? 5:5)));
}
+
gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
"Identity: chipFeatures=0x%08X",
Identity->chipFeatures);
/* Enable the GPU. */
gcmkONERROR(gckOS_SetGPUPower(Os, Core, gcvTRUE, gcvTRUE));
- gcmkONERROR(gckOS_WriteRegisterEx(Os, Core, 0x00000, 0));
+ gcmkONERROR(gckOS_WriteRegisterEx(Os,
+ Core,
+ 0x00000,
+ 0x00000900));
/* Allocate the gckHARDWARE object. */
gcmkONERROR(gckOS_Allocate(Os,
if (hardware != gcvNULL)
{
/* Turn off the power. */
- gcmkVERIFY_OK(gckOS_SetGPUPower(Os, hardware->core, gcvFALSE, gcvFALSE));
+ gcmkVERIFY_OK(gckOS_SetGPUPower(Os, Core, gcvFALSE, gcvFALSE));
if (hardware->globalSemaphore != gcvNULL)
{
gcvPOWER_FLAG_DELAY |
gcvPOWER_FLAG_CLOCK_ON,
/* OFF */ gcvPOWER_FLAG_SAVE |
- gcvPOWER_FLAG_POWER_OFF,
+ gcvPOWER_FLAG_POWER_OFF |
+ gcvPOWER_FLAG_CLOCK_OFF,
/* IDLE */ gcvPOWER_FLAG_START |
gcvPOWER_FLAG_DELAY |
gcvPOWER_FLAG_CLOCK_ON,
if (kernel->hardware != gcvNULL)
{
/* Turn off the power. */
- gcmkVERIFY_OK(gckOS_SetGPUPower(kernel->hardware->os, kernel->hardware->core, gcvFALSE, gcvFALSE));
+ gcmkVERIFY_OK(gckOS_SetGPUPower(kernel->hardware->os,
+ kernel->hardware->core,
+ gcvFALSE,
+ gcvFALSE));
gcmkVERIFY_OK(gckHARDWARE_Destroy(kernel->hardware));
}
}
break;
case gcvHAL_UNMAP_USER_MEMORY:
- address = Interface->u.MapUserMemory.address;
+ address = Interface->u.UnmapUserMemory.address;
/* Unmap user memory. */
gcmkONERROR(
#if gcdREGISTER_ACCESS_FROM_USER
{
gceCHIPPOWERSTATE power;
+
+ gckOS_AcquireMutex(Kernel->os, Kernel->hardware->powerMutex, gcvINFINITE);
gcmkONERROR(gckHARDWARE_QueryPowerManagementState(Kernel->hardware,
&power));
-
if (power == gcvPOWER_ON)
{
/* Read a register. */
Interface->u.ReadRegisterData.data = 0;
status = gcvSTATUS_CHIP_NOT_READY;
}
+ gcmkONERROR(gckOS_ReleaseMutex(Kernel->os, Kernel->hardware->powerMutex));
}
#else
/* No access from user land to read registers. */
case gcvHAL_WRITE_REGISTER:
#if gcdREGISTER_ACCESS_FROM_USER
- /* Write a register. */
- gcmkONERROR(
- gckOS_WriteRegisterEx(Kernel->os,
- Kernel->core,
- Interface->u.WriteRegisterData.address,
- Interface->u.WriteRegisterData.data));
+ {
+ gceCHIPPOWERSTATE power;
+
+ gckOS_AcquireMutex(Kernel->os, Kernel->hardware->powerMutex, gcvINFINITE);
+ gcmkONERROR(gckHARDWARE_QueryPowerManagementState(Kernel->hardware,
+ &power));
+ if (power == gcvPOWER_ON)
+ {
+ /* Write a register. */
+ gcmkONERROR(
+ gckOS_WriteRegisterEx(Kernel->os,
+ Kernel->core,
+ Interface->u.WriteRegisterData.address,
+ Interface->u.WriteRegisterData.data));
+ }
+ else
+ {
+ /* Chip is in power-state. */
+ Interface->u.WriteRegisterData.data = 0;
+ status = gcvSTATUS_CHIP_NOT_READY;
+ }
+ gcmkONERROR(gckOS_ReleaseMutex(Kernel->os, Kernel->hardware->powerMutex));
+ }
#else
/* No access from user land to write registers. */
status = gcvSTATUS_NOT_SUPPORTED;
gctSIZE_T pageCount;
/* Used only when node is not contiguous */
- gctPOINTER pageTables[gcdCORE_COUNT];
+ gctPOINTER pageTables[gcdGPU_COUNT];
/* Pointer to gckKERNEL object who lock this. */
- gckKERNEL lockKernels[gcdCORE_COUNT];
+ gckKERNEL lockKernels[gcdGPU_COUNT];
/* Actual physical address */
- gctUINT32 addresses[gcdCORE_COUNT];
+ gctUINT32 addresses[gcdGPU_COUNT];
/* Mutex. */
gctPOINTER mutex;
/* Locked counter. */
- gctINT32 lockeds[gcdCORE_COUNT];
+ gctINT32 lockeds[gcdGPU_COUNT];
#ifdef __QNXNTO__
/* Single linked list of nodes. */
gcuVIDMEM_NODE_PTR next;
/* Unlock pending flag. */
- gctBOOL unlockPendings[gcdCORE_COUNT];
+ gctBOOL unlockPendings[gcdGPU_COUNT];
/* Free pending flag. */
gctBOOL freePending;
gcmkONERROR(gckOS_Broadcast(
os, hardware, gcvBROADCAST_GPU_STUCK
));
-
- gcmkONERROR(gcvSTATUS_GPU_NOT_RESPONDING);
}
/* Delete the signal. */
gcsBLOCK_TASK_ENTRY_PTR TaskHeader
);
-static gceSTATUS
-_TaskUnmapMemory(
- gckVGCOMMAND Command,
- gcsBLOCK_TASK_ENTRY_PTR TaskHeader
- );
-
static gctTASKROUTINE _taskRoutine[] =
{
_TaskLink, /* gcvTASK_LINK */
_TaskFreeVideoMemory, /* gcvTASK_FREE_VIDEO_MEMORY */
_TaskFreeContiguousMemory, /* gcvTASK_FREE_CONTIGUOUS_MEMORY */
_TaskUnmapUserMemory, /* gcvTASK_UNMAP_USER_MEMORY */
- _TaskUnmapMemory, /* gcvTASK_UNMAP_MEMORY */
};
static gceSTATUS
return status;
}
-static gceSTATUS
-_TaskUnmapMemory(
- gckVGCOMMAND Command,
- gcsBLOCK_TASK_ENTRY_PTR TaskHeader
- )
-{
- gceSTATUS status;
-
- do
- {
- /* Cast the task pointer. */
- gcsTASK_UNMAP_MEMORY_PTR task
- = (gcsTASK_UNMAP_MEMORY_PTR) TaskHeader->task;
-
- /* Unmap memory. */
- gcmkERR_BREAK(gckKERNEL_UnmapMemory(
- Command->kernel->kernel, task->physical, task->bytes, task->logical
- ));
-
- /* Update the reference counter. */
- TaskHeader->container->referenceCount -= 1;
-
- /* Update the task pointer. */
- TaskHeader->task = (gcsTASK_HEADER_PTR) (task + 1);
- }
- while (gcvFALSE);
-
- /* Return status. */
- return status;
-}
-
-
/******************************************************************************\
************ Hardware Block Interrupt Handlers For Scheduled Events ************
\******************************************************************************/
#if gcdTHREAD_BUFFERS > 1
/* Get the current thread ID. */
- gctUINT32 threadID = gcmkGETTHREADID();
+ gctUINT32 ThreadID = gcmkGETTHREADID();
/* Locate the output buffer for the thread. */
outputBuffer = _outputBufferHead;
/* Reset the buffer. */
outputBuffer->threadID = ThreadID;
+#if gcdBUFFERED_OUTPUT
outputBuffer->start = 0;
outputBuffer->index = 0;
outputBuffer->count = 0;
+#endif
+#if gcdSHOW_LINE_NUMBER
outputBuffer->lineNumber = 0;
+#endif
}
#else
outputBuffer = _outputBufferHead;
{
gceSTATUS status;
gctBOOL empty = gcvFALSE, idle = gcvFALSE;
+ gctUINT32 process, thread;
+ gctBOOL powerLocked = gcvFALSE;
+ gckHARDWARE hardware;
+
gcmkHEADER_ARG("Event=0x%x", Event);
/* Verify the arguments. */
gcmkVERIFY_OBJECT(Event, gcvOBJ_EVENT);
+ /* Grab gckHARDWARE object. */
+ hardware = Event->kernel->hardware;
+ gcmkVERIFY_OBJECT(hardware, gcvOBJ_HARDWARE);
+
+
/* Check whether the event queue is empty. */
gcmkONERROR(gckEVENT_IsEmpty(Event, &empty));
if (empty)
{
+ status = gckOS_AcquireMutex(hardware->os, hardware->powerMutex, 0);
+ if (status == gcvSTATUS_TIMEOUT)
+ {
+ gcmkONERROR(gckOS_GetProcessID(&process));
+ gcmkONERROR(gckOS_GetThreadID(&thread));
+
+ /* Just return to prevent deadlock. */
+ if ((hardware->powerProcess != process)
+ || (hardware->powerThread != thread))
+ {
+ gcmkFOOTER_NO();
+ return gcvSTATUS_OK;
+ }
+ }
+ else
+ {
+ powerLocked = gcvTRUE;
+ }
+
/* Query whether the hardware is idle. */
gcmkONERROR(gckHARDWARE_QueryIdle(Event->kernel->hardware, &idle));
+ if (powerLocked)
+ {
+ gcmkONERROR(gckOS_ReleaseMutex(hardware->os, hardware->powerMutex));
+ powerLocked = gcvFALSE;
+ }
+
if (idle)
{
/* Inform the system of idle GPU. */
return gcvSTATUS_OK;
OnError:
+
+ if (powerLocked)
+ {
+ gcmkONERROR(gckOS_ReleaseMutex(hardware->os, hardware->powerMutex));
+ powerLocked = gcvFALSE;
+ }
+
gcmkFOOTER();
return status;
}
gckMMU mmu;
/* Hardwares which use this shared pagetable. */
- gckHARDWARE hardwares[gcdCORE_COUNT];
+ gckHARDWARE hardwares[gcdGPU_COUNT];
/* Number of cores use this shared pagetable. */
gctUINT32 reference;
gcmkONERROR(_SetupDynamicSpace(Mmu));
#if gcdSHARED_PAGETABLE
- for(i = 0; i < gcdCORE_COUNT; i++)
+ for(i = 0; i < gcdGPU_COUNT; i++)
{
hardware = sharedPageTable->hardwares[i];
if (hardware != gcvNULL)
gckHARDWARE hardware;
#if gcdSHARED_PAGETABLE
gctINT i;
- for (i = 0; i < gcdCORE_COUNT; i++)
+ for (i = 0; i < gcdGPU_COUNT; i++)
{
#if gcdENABLE_VG
if (i == gcvCORE_VG)
node->Virtual.contiguous = Contiguous;
node->Virtual.logical = gcvNULL;
- for (i = 0; i < gcdCORE_COUNT; i++)
+ for (i = 0; i < gcdGPU_COUNT; i++)
{
node->Virtual.lockeds[i] = 0;
node->Virtual.pageTables[i] = gcvNULL;
#ifdef __QNXNTO__
node->Virtual.next = gcvNULL;
node->Virtual.freePending = gcvFALSE;
- for (i = 0; i < gcdCORE_COUNT; i++)
+ for (i = 0; i < gcdGPU_COUNT; i++)
{
node->Virtual.unlockPendings[i] = gcvFALSE;
}
/* Delete the mutex. */
gcmkVERIFY_OK(gckOS_DeleteMutex(os, Node->Virtual.mutex));
- for (i = 0; i < gcdCORE_COUNT; i++)
+ for (i = 0; i < gcdGPU_COUNT; i++)
{
if (Node->Virtual.pageTables[i] != gcvNULL)
{
acquired = gcvTRUE;
- for (i = 0, totalLocked = 0; i < gcdCORE_COUNT; i++)
+ for (i = 0, totalLocked = 0; i < gcdGPU_COUNT; i++)
{
totalLocked += Node->Virtual.lockeds[i];
}
gcmkVERIFY_ARGUMENT(Kernel != gcvNULL);
gcmkVERIFY_ARGUMENT(Node != gcvNULL);
gcmkVERIFY_ARGUMENT(NeedMapping != gcvNULL);
- gcmkVERIFY_ARGUMENT(Core < gcdCORE_COUNT);
+ gcmkVERIFY_ARGUMENT(Core < gcdGPU_COUNT);
if (Node->Virtual.contiguous)
{
#endif
}
- for (i = 0, totalLocked = 0; i < gcdCORE_COUNT; i++)
+ for (i = 0, totalLocked = 0; i < gcdGPU_COUNT; i++)
{
totalLocked += Node->Virtual.lockeds[i];
}
}
gceCORE;
-#define gcdCORE_COUNT 3
+#define gcdGPU_COUNT 3
/*******************************************************************************
**
** gckOS Os
** Pointer to a gckOS object.ß
**
-** gceCORE Core
-** Core type.
+** gckCORE Core
+** GPU whose power is set.
**
** gctBOOL Clock
** gcvTRUE to turn on the clock, or gcvFALSE to turn off the clock.
gco3D engine3D;
#endif
gco2D engine2D;
+ gctBOOL copied;
}
gcsTLS;
OUT gcsTLS_PTR * TLS
);
+ /* Copy the TLS from a source thread. */
+ gceSTATUS gcoOS_CopyTLS(IN gcsTLS_PTR Source);
+
/* Destroy the objects associated with the current thread. */
void
gcoOS_FreeThreadData(
IN gctUINT32 Address
);
+/* Enable dump or not. */
+gceSTATUS
+gcoDUMP_SetDumpFlag(
+ IN gctBOOL DumpState
+ );
/******************************************************************************\
******************************* gcsRECT Structure ******************************
gcvTASK_UNLOCK_VIDEO_MEMORY,
gcvTASK_FREE_VIDEO_MEMORY,
gcvTASK_FREE_CONTIGUOUS_MEMORY,
- gcvTASK_UNMAP_USER_MEMORY,
- gcvTASK_UNMAP_MEMORY
+ gcvTASK_UNMAP_USER_MEMORY
}
gceTASK;
}
gcsTASK_UNMAP_USER_MEMORY;
-typedef struct _gcsTASK_UNMAP_MEMORY * gcsTASK_UNMAP_MEMORY_PTR;
-typedef struct _gcsTASK_UNMAP_MEMORY
-{
- /* Task ID (gcvTASK_UNMAP_MEMORY). */
- IN gceTASK id;
-
- /* Physical memory address to unmap. */
- IN gctPHYS_ADDR physical;
-
- /* Number of bytes in physical memory to unmap. */
- IN gctSIZE_T bytes;
-
- /* Address of mapped memory to unmap. */
- IN gctPOINTER logical;
-}
-gcsTASK_UNMAP_MEMORY;
-
#ifdef __cplusplus
}
#endif
} BITFIELDINFO;
#elif defined(LINUX) && defined(EGL_API_FB) && !defined(__APPLE__)
+
+#if defined(EGL_API_WL)
+/* Wayland platform. */
+
+#include <wayland-egl.h>
+
+#define WL_EGL_NUM_BACKBUFFERS 2
+
+struct wl_egl_buffer_info
+{
+ gctINT32 width;
+ gctINT32 height;
+ gctINT32 stride;
+ gctUINT32 physical;
+ gctPOINTER logical;
+ gceSURF_FORMAT format;
+ gcoSURF surface;
+};
+
+struct wl_egl_buffer
+{
+ struct wl_buffer* wl_buffer;
+ struct wl_egl_buffer_info info;
+};
+
+struct wl_egl_window_info
+{
+ gctUINT width;
+ gctUINT height;
+ gceSURF_FORMAT format;
+ gctUINT bpp;
+};
+
+struct wl_egl_window
+{
+/* struct wl_egl_display *display;*/
+ struct wl_surface* surface;
+ struct wl_egl_window_info info;
+ struct wl_egl_buffer backbuffers[WL_EGL_NUM_BACKBUFFERS];
+ gctUINT current;
+ /*
+ int backbuffer;
+ int dx;
+ int dy;
+*/
+};
+
+
+typedef void* HALNativeDisplayType;
+typedef void* HALNativeWindowType;
+typedef void* HALNativePixmapType;
+#else
/* Linux platform for FBDEV. */
typedef struct _FBDisplay * HALNativeDisplayType;
typedef struct _FBWindow * HALNativeWindowType;
typedef struct _FBPixmap * HALNativePixmapType;
-
+#endif
#elif defined(__ANDROID__) || defined(ANDROID)
struct egl_native_pixmap_t;
** if the address is not known for the specified display. */
gctSIZE_T physical;
+ gctBOOL isCompositor; /* true if compositor, false otherwise. */
+
#ifndef __QNXNTO__
/* 355_FB_MULTI_BUFFER */
gctINT multiBuffer;
IN gcsTHREAD_WALKER_INFO_PTR Info
);
+#if gcdUSE_WCLIP_PATCH
+/* Set w clip and w plane limit value. */
+gceSTATUS
+gco3D_SetWClipEnable(
+ IN gco3D Engine,
+ IN gctBOOL Enable
+ );
+
+gceSTATUS
+gco3D_SetWPlaneLimitF(
+ IN gco3D Engine,
+ IN gctFLOAT Value
+ );
+
+gceSTATUS
+gco3D_SetWPlaneLimitX(
+ IN gco3D Engine,
+ IN gctFIXED_POINT Value
+ );
+#endif
+
/*----------------------------------------------------------------------------*/
/*-------------------------- gco3D Fragment Processor ------------------------*/
gcoTEXTURE_AddMipMap(
IN gcoTEXTURE Texture,
IN gctINT Level,
+ IN gctINT imageFormat,
IN gceSURF_FORMAT Format,
IN gctUINT Width,
IN gctUINT Height,
gcvFEATURE_RS_YUV_TARGET,
gcvFEATURE_2D_FC_SOURCE,
gcvFEATURE_PE_DITHER_FIX,
+ gcvFEATURE_2D_YUV_SEPARATE_STRIDE,
}
gceFEATURE;
}
gceSURF_ROTATION;
+typedef enum _gceMIPMAP_IMAGE_FORMAT
+{
+ gcvUNKNOWN_MIPMAP_IMAGE_FORMAT = -2
+}
+gceMIPMAP_IMAGE_FORMAT;
+
+
/* Surface formats. */
typedef enum _gceSURF_FORMAT
{
# define gcdALPHA_KILL_IN_SHADER 1
#endif
+/* gcdHIGH_PRECISION_DELAY_ENABLE
+ *
+ * Enable high precision schedule delay with 1ms unit. otherwise schedule delay up to 10ms.
+ * Browser app performance will have obvious drop without this enablement
+ */
+#ifndef gcdHIGH_PRECISION_DELAY_ENABLE
+# define gcdHIGH_PRECISION_DELAY_ENABLE 1
+#endif
+
+#ifndef gcdUSE_WCLIP_PATCH
+# define gcdUSE_WCLIP_PATCH 0
+#endif
+
#endif /* __gc_hal_options_h_ */
#define gcvVERSION_MINOR 6
-#define gcvVERSION_PATCH 7
+#define gcvVERSION_PATCH 8
-#define gcvVERSION_BUILD 1422
+#define gcvVERSION_BUILD 1443
#define gcvVERSION_DATE __DATE__
device->requestedContiguousSize = 0;
- for (i = 0; i < gcdCORE_COUNT; i++)
+ for (i = 0; i < gcdGPU_COUNT; i++)
{
physical = device->requestedRegisterMemBases[i];
device->irqLines[gcvCORE_VG] = IrqLineVG;
/* Initialize the kernel thread semaphores. */
- for (i = 0; i < gcdCORE_COUNT; i++)
+ for (i = 0; i < gcdGPU_COUNT; i++)
{
if (device->irqLines[i] != -1) sema_init(&device->semas[i], 0);
}
device->signal = Signal;
- for (i = 0; i < gcdCORE_COUNT; i++)
+ for (i = 0; i < gcdGPU_COUNT; i++)
{
if (device->kernels[i] != gcvNULL) break;
}
- if (i == gcdCORE_COUNT) gcmkONERROR(gcvSTATUS_INVALID_ARGUMENT);
+ if (i == gcdGPU_COUNT) gcmkONERROR(gcvSTATUS_INVALID_ARGUMENT);
#if gcdENABLE_VG
if (i == gcvCORE_VG)
if (Device != gcvNULL)
{
- for (i = 0; i < gcdCORE_COUNT; i++)
+ for (i = 0; i < gcdGPU_COUNT; i++)
{
if (Device->kernels[i] != gcvNULL)
{
}
}
- for (i = 0; i < gcdCORE_COUNT; i++)
+ for (i = 0; i < gcdGPU_COUNT; i++)
{
if (Device->registerBases[i] != gcvNULL)
{
gcmkVERIFY_ARGUMENT(Device != NULL);
- for (i = 0; i < gcdCORE_COUNT; i++)
+ for (i = 0; i < gcdGPU_COUNT; i++)
{
/* Stop the kernel threads. */
if (Device->threadInitializeds[i])
{
/* Objects. */
gckOS os;
- gckKERNEL kernels[gcdCORE_COUNT];
+ gckKERNEL kernels[gcdGPU_COUNT];
/* Attributes. */
gctSIZE_T internalSize;
gctPOINTER contiguousMappedUser;
gctSIZE_T systemMemorySize;
gctUINT32 systemMemoryBaseAddress;
- gctPOINTER registerBases[gcdCORE_COUNT];
- gctSIZE_T registerSizes[gcdCORE_COUNT];
+ gctPOINTER registerBases[gcdGPU_COUNT];
+ gctSIZE_T registerSizes[gcdGPU_COUNT];
gctUINT32 baseAddress;
- gctUINT32 requestedRegisterMemBases[gcdCORE_COUNT];
- gctSIZE_T requestedRegisterMemSizes[gcdCORE_COUNT];
+ gctUINT32 requestedRegisterMemBases[gcdGPU_COUNT];
+ gctSIZE_T requestedRegisterMemSizes[gcdGPU_COUNT];
gctUINT32 requestedContiguousBase;
gctSIZE_T requestedContiguousSize;
/* IRQ management. */
- gctINT irqLines[gcdCORE_COUNT];
- gctBOOL isrInitializeds[gcdCORE_COUNT];
- gctBOOL dataReadys[gcdCORE_COUNT];
+ gctINT irqLines[gcdGPU_COUNT];
+ gctBOOL isrInitializeds[gcdGPU_COUNT];
+ gctBOOL dataReadys[gcdGPU_COUNT];
/* Thread management. */
- struct task_struct *threadCtxts[gcdCORE_COUNT];
- struct semaphore semas[gcdCORE_COUNT];
- gctBOOL threadInitializeds[gcdCORE_COUNT];
+ struct task_struct *threadCtxts[gcdGPU_COUNT];
+ struct semaphore semas[gcdGPU_COUNT];
+ gctBOOL threadInitializeds[gcdGPU_COUNT];
gctBOOL killThread;
/* Signal management. */
gceCORE coreMapping[8];
/* States before suspend. */
- gceCHIPPOWERSTATE statesStored[gcdCORE_COUNT];
+ gceCHIPPOWERSTATE statesStored[gcdGPU_COUNT];
/* Clock management.*/
struct clk *clk_3d_core;
static ulong contiguousBase = 0;
module_param(contiguousBase, ulong, 0644);
-static ulong bankSize = 32 << 20;
+static ulong bankSize = 0;
module_param(bankSize, ulong, 0644);
static int fastClear = -1;
gcmkONERROR(gckOS_GetProcessID(&data->pidOpen));
/* Attached the process. */
- for (i = 0; i < gcdCORE_COUNT; i++)
+ for (i = 0; i < gcdGPU_COUNT; i++)
{
if (galDevice->kernels[i] != gcvNULL)
{
if (attached)
{
- for (i = 0; i < gcdCORE_COUNT; i++)
+ for (i = 0; i < gcdGPU_COUNT; i++)
{
if (galDevice->kernels[i] != gcvNULL)
{
}
/* A process gets detached. */
- for (i = 0; i < gcdCORE_COUNT; i++)
+ for (i = 0; i < gcdGPU_COUNT; i++)
{
if (galDevice->kernels[i] != gcvNULL)
{
if (iface.command == gcvHAL_CHIP_INFO)
{
count = 0;
- for (i = 0; i < gcdCORE_COUNT; i++)
+ for (i = 0; i < gcdGPU_COUNT; i++)
{
if (device->kernels[i] != gcvNULL)
{
device = platform_get_drvdata(dev);
- for (i = 0; i < gcdCORE_COUNT; i++)
+ for (i = 0; i < gcdGPU_COUNT; i++)
{
if (device->kernels[i] != gcvNULL)
{
device = platform_get_drvdata(dev);
- for (i = 0; i < gcdCORE_COUNT; i++)
+ for (i = 0; i < gcdGPU_COUNT; i++)
{
if (device->kernels[i] != gcvNULL)
{
#include <linux/idr.h>
#include <mach/hardware.h>
#include <linux/workqueue.h>
+#include <linux/idr.h>
#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,23)
#include <linux/math64.h>
#endif
gctUINT32 kernelProcessID;
/* Signal management. */
+
/* Lock. */
gctPOINTER signalMutex;
/* ID. */
gctUINT32 id;
-
}
gcsSIGNAL;
#endif /* gcdUSE_NON_PAGED_MEMORY_CACHE */
- /*******************************************************************************
-+** Integer Id Management.
-+*/
+/*******************************************************************************
+** Integer Id Management.
+*/
gceSTATUS
_AllocateIntegerId(
IN gcsINTEGER_DB_PTR Database,
OUT gctPOINTER * KernelPointer
)
{
- gceSTATUS status;
gctPOINTER pointer;
spin_lock(&Database->lock);
if(pointer)
{
*KernelPointer = pointer;
- status = gcvSTATUS_OK;
+ return gcvSTATUS_OK;
}
else
{
"%s(%d) Id = %d is not found",
__FUNCTION__, __LINE__, Id);
- status = gcvSTATUS_NOT_FOUND;
+ return gcvSTATUS_NOT_FOUND;
}
-
- return status;
}
gceSTATUS
return gcvSTATUS_OK;
}
+static void
+_UnmapUserLogical(
+ IN gctINT Pid,
+ IN gctPOINTER Logical,
+ IN gctUINT32 Size
+)
+{
+ struct task_struct *task;
+ struct mm_struct *mm;
+
+ /* Get the task_struct of the task with stored pid. */
+ rcu_read_lock();
+
+ task = FIND_TASK_BY_PID(Pid);
+
+ if (task == gcvNULL)
+ {
+ rcu_read_unlock();
+ return;
+ }
+
+ /* Get the mm_struct. */
+ mm = get_task_mm(task);
+
+ rcu_read_unlock();
+
+ if (mm == gcvNULL)
+ {
+ return;
+ }
+
+ down_write(&mm->mmap_sem);
+ if (do_munmap(mm, (unsigned long)Logical, Size) < 0)
+ {
+ gcmkTRACE_ZONE(
+ gcvLEVEL_WARNING, gcvZONE_OS,
+ "%s(%d): do_munmap failed",
+ __FUNCTION__, __LINE__
+ );
+ }
+ up_write(&mm->mmap_sem);
+
+ /* Dereference. */
+ mmput(mm);
+}
+
/*******************************************************************************
**
** gckOS_Construct
*/
/* Destroy the mutex. */
-
gcmkVERIFY_OK(gckOS_DeleteMutex(Os, Os->signalMutex));
if (Os->heap != gcvNULL)
{
PLINUX_MDL_MAP mdlMap;
PLINUX_MDL mdl = (PLINUX_MDL)Physical;
- struct task_struct * task;
gcmkHEADER_ARG("Os=0x%X Physical=0x%X Bytes=%lu Logical=0x%X PID=%d",
Os, Physical, Bytes, Logical, PID);
return gcvSTATUS_INVALID_ARGUMENT;
}
- /* Get the current pointer for the task with stored pid. */
- task = FIND_TASK_BY_PID(mdlMap->pid);
-
- if (task != gcvNULL && task->mm != gcvNULL)
- {
- down_write(&task->mm->mmap_sem);
- do_munmap(task->mm, (unsigned long)Logical, mdl->numPages*PAGE_SIZE);
- up_write(&task->mm->mmap_sem);
- }
- else
- {
- gcmkTRACE_ZONE(
- gcvLEVEL_INFO, gcvZONE_OS,
- "%s(%d): can't find the task with pid->%d. No unmapping",
- __FUNCTION__, __LINE__,
- mdlMap->pid
- );
- }
+ _UnmapUserLogical(PID, mdlMap->vmaAddr, mdl->numPages * PAGE_SIZE);
gcmkVERIFY_OK(_DestroyMdlMap(mdl, mdlMap));
}
{
PLINUX_MDL mdl;
PLINUX_MDL_MAP mdlMap;
- struct task_struct * task;
#ifdef NO_DMA_COHERENT
unsigned size;
gctPOINTER vaddr;
{
if (mdlMap->vmaAddr != gcvNULL)
{
- /* Get the current pointer for the task with stored pid. */
- task = FIND_TASK_BY_PID(mdlMap->pid);
-
- if (task != gcvNULL && task->mm != gcvNULL)
- {
- down_write(&task->mm->mmap_sem);
-
- if (do_munmap(task->mm,
- (unsigned long)mdlMap->vmaAddr,
- mdl->numPages * PAGE_SIZE) < 0)
- {
- gcmkTRACE_ZONE(
- gcvLEVEL_WARNING, gcvZONE_OS,
- "%s(%d): do_munmap failed",
- __FUNCTION__, __LINE__
- );
- }
-
- up_write(&task->mm->mmap_sem);
- }
-
+ _UnmapUserLogical(mdlMap->pid, mdlMap->vmaAddr, mdl->numPages * PAGE_SIZE);
mdlMap->vmaAddr = gcvNULL;
}
IN gctUINT32 Delay
)
{
- struct timeval now;
- unsigned long jiffies;
-
gcmkHEADER_ARG("Os=0x%X Delay=%u", Os, Delay);
if (Delay > 0)
{
+#if gcdHIGH_PRECISION_DELAY_ENABLE
+ ktime_t wait = ns_to_ktime(Delay * 1000 * 1000);
+ set_current_state(TASK_INTERRUPTIBLE);
+ schedule_hrtimeout(&wait, HRTIMER_MODE_REL);
+#else
+ struct timeval now;
+ unsigned long jiffies;
+
/* Convert milliseconds into seconds and microseconds. */
now.tv_sec = Delay / 1000;
now.tv_usec = (Delay % 1000) * 1000;
/* Schedule timeout. */
schedule_timeout_interruptible(jiffies);
+#endif
}
/* Success. */
{
PLINUX_MDL_MAP mdlMap;
PLINUX_MDL mdl = (PLINUX_MDL)Physical;
- struct task_struct * task;
gcmkHEADER_ARG("Os=0x%X Physical=0x%X Bytes=%u Logical=0x%X",
Os, Physical, Bytes, Logical);
{
if ((mdlMap->vmaAddr != gcvNULL) && (_GetProcessID() == mdlMap->pid))
{
- /* Get the current pointer for the task with stored pid. */
- task = FIND_TASK_BY_PID(mdlMap->pid);
-
- if (task != gcvNULL && task->mm != gcvNULL)
- {
- down_write(&task->mm->mmap_sem);
- do_munmap(task->mm, (unsigned long)mdlMap->vmaAddr, mdl->numPages * PAGE_SIZE);
- up_write(&task->mm->mmap_sem);
- }
-
+ _UnmapUserLogical(mdlMap->pid, mdlMap->vmaAddr, mdl->numPages * PAGE_SIZE);
mdlMap->vmaAddr = gcvNULL;
}
** gckOS Os
** Pointer to a gckOS object.
**
-** gceCORE Core
-** Core type.
+** gckCORE Core
+** GPU whose power is set.
**
** gctBOOL Clock
** gcvTRUE to turn on the clock, or gcvFALSE to turn off the clock.
/* Success. */
gcmkFOOTER_NO();
return gcvSTATUS_OK;
+
OnError:
if (acquired)
{
{
gceSTATUS status;
gcsSIGNAL_PTR signal;
-
gcmkHEADER_ARG("Os=0x%X Signal=0x%X Process=0x%X", Os, Signal, Process);
gcmkVERIFY_ARGUMENT(Signal != gcvNULL);
gcmkONERROR(_QueryIntegerId(&Os->signalDB, (gctUINT32)Signal, (gctPOINTER)&signal));
- if (atomic_inc_return(&signal->ref) <= 1)
+ if(atomic_inc_return(&signal->ref) <= 1)
{
/* The previous value is 0, it has been deleted. */
gcmkONERROR(gcvSTATUS_INVALID_ARGUMENT);
OUT gctINT * SignalID
)
{
+ /* Create a new signal. */
return gckOS_CreateSignal(Os, ManualReset, (gctSIGNAL *) SignalID);
}