unsigned char cmds;
#define SD_SCR_CMD20_SUPPORT (1<<0)
#define SD_SCR_CMD23_SUPPORT (1<<1)
+ unsigned char sda_vsn3;
};
struct sd_ssr {
#define MMC_STATE_HIGHSPEED_DDR (1<<4) /* card is in high speed mode */
#define MMC_STATE_ULTRAHIGHSPEED (1<<5) /* card is in ultra high speed mode */
#define MMC_CARD_SDXC (1<<6) /* card is SDXC */
+#define MMC_STATE_SD_SDR50 (1<<5) /* card is in sdr50 mode */
+#define MMC_STATE_SD_SDR104 (1<<6) /* card is in sdr104 mode */
+#define MMC_STATE_SD_DDR50 (1<<7) /* card is in ddr50 mode */
unsigned int quirks; /* card quirks */
#define MMC_QUIRK_LENIENT_FN0 (1<<0) /* allow SDIO FN0 writes outside of the VS CCCR range */
#define MMC_QUIRK_BLKSZ_FOR_BYTE_MODE (1<<1) /* use func->cur_blksize */
#define MMC_SET_DRIVER_TYPE_A 1
#define MMC_SET_DRIVER_TYPE_C 2
#define MMC_SET_DRIVER_TYPE_D 3
+ unsigned int tuning_flag; /* request tuning only */
+ unsigned int tuning; /* tuning parameter */
};
struct mmc_host_ops {
unsigned int max_req_size; /* maximum number of bytes in one req */
unsigned int max_blk_size; /* maximum size of one mmc block */
unsigned int max_blk_count; /* maximum number of blocks in one req */
-
+ unsigned int tuning_min;
+ unsigned int tuning_max;
+ unsigned int tuning_step;
/* private data */
spinlock_t lock; /* lock for claim and bus ops */
#define SD_SWITCH_ACCESS_DEF 0
#define SD_SWITCH_ACCESS_HS 1
-#endif
+#define SD_VOLTAGE_SWITCH 11
+#define SD_TUNING_CMD 19
+#endif
unsigned int tuning_mode; /* Re-tuning mode supported by host */
#define SDHCI_TUNING_MODE_1 0
struct timer_list tuning_timer; /* Timer for tuning */
+ unsigned int tuning_min;
+ unsigned int tuning_max;
+ unsigned int tuning_step;
unsigned long private[0] ____cacheline_aligned;
};