#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/soc.h>
+#include <sound/dmaengine_pcm.h>
#include "tegra_asoc_utils.h"
#include "tegra20_ac97.h"
}
ac97->capture_dma_data.addr = mem->start + TEGRA20_AC97_FIFO_RX1;
- ac97->capture_dma_data.wrap = 4;
- ac97->capture_dma_data.width = 32;
- ac97->capture_dma_data.req_sel = of_dma[1];
+ ac97->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
+ ac97->capture_dma_data.maxburst = 4;
+ ac97->capture_dma_data.slave_id = of_dma[1];
ac97->playback_dma_data.addr = mem->start + TEGRA20_AC97_FIFO_TX1;
- ac97->playback_dma_data.wrap = 4;
- ac97->playback_dma_data.width = 32;
- ac97->playback_dma_data.req_sel = of_dma[1];
+ ac97->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
+ ac97->capture_dma_data.maxburst = 4;
+ ac97->capture_dma_data.slave_id = of_dma[0];
ret = snd_soc_register_dais(&pdev->dev, &tegra20_ac97_dai, 1);
if (ret) {
struct tegra20_ac97 {
struct clk *clk_ac97;
- struct tegra_pcm_dma_params capture_dma_data;
- struct tegra_pcm_dma_params playback_dma_data;
+ struct snd_dmaengine_dai_dma_data capture_dma_data;
+ struct snd_dmaengine_dai_dma_data playback_dma_data;
struct regmap *regmap;
int reset_gpio;
int sync_gpio;
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/soc.h>
+#include <sound/dmaengine_pcm.h>
#include "tegra20_i2s.h"
}
i2s->capture_dma_data.addr = mem->start + TEGRA20_I2S_FIFO2;
- i2s->capture_dma_data.wrap = 4;
- i2s->capture_dma_data.width = 32;
- i2s->capture_dma_data.req_sel = dma_ch;
+ i2s->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
+ i2s->capture_dma_data.maxburst = 4;
+ i2s->capture_dma_data.slave_id = dma_ch;
i2s->playback_dma_data.addr = mem->start + TEGRA20_I2S_FIFO1;
- i2s->playback_dma_data.wrap = 4;
- i2s->playback_dma_data.width = 32;
- i2s->playback_dma_data.req_sel = dma_ch;
+ i2s->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
+ i2s->playback_dma_data.maxburst = 4;
+ i2s->playback_dma_data.slave_id = dma_ch;
pm_runtime_enable(&pdev->dev);
if (!pm_runtime_enabled(&pdev->dev)) {
struct tegra20_i2s {
struct snd_soc_dai_driver dai;
struct clk *clk_i2s;
- struct tegra_pcm_dma_params capture_dma_data;
- struct tegra_pcm_dma_params playback_dma_data;
+ struct snd_dmaengine_dai_dma_data capture_dma_data;
+ struct snd_dmaengine_dai_dma_data playback_dma_data;
struct regmap *regmap;
};
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/soc.h>
+#include <sound/dmaengine_pcm.h>
#include "tegra20_spdif.h"
}
spdif->playback_dma_data.addr = mem->start + TEGRA20_SPDIF_DATA_OUT;
- spdif->playback_dma_data.wrap = 4;
- spdif->playback_dma_data.width = 32;
- spdif->playback_dma_data.req_sel = dmareq->start;
+ spdif->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
+ spdif->capture_dma_data.maxburst = 4;
+ spdif->playback_dma_data.slave_id = dmareq->start;
pm_runtime_enable(&pdev->dev);
if (!pm_runtime_enabled(&pdev->dev)) {
struct tegra20_spdif {
struct clk *clk_spdif_out;
- struct tegra_pcm_dma_params capture_dma_data;
- struct tegra_pcm_dma_params playback_dma_data;
+ struct snd_dmaengine_dai_dma_data capture_dma_data;
+ struct snd_dmaengine_dai_dma_data playback_dma_data;
struct regmap *regmap;
};
}
int tegra30_ahub_allocate_rx_fifo(enum tegra30_ahub_rxcif *rxcif,
- unsigned long *fiforeg,
- unsigned long *reqsel)
+ dma_addr_t *fiforeg,
+ unsigned int *reqsel)
{
int channel;
u32 reg, val;
EXPORT_SYMBOL_GPL(tegra30_ahub_free_rx_fifo);
int tegra30_ahub_allocate_tx_fifo(enum tegra30_ahub_txcif *txcif,
- unsigned long *fiforeg,
- unsigned long *reqsel)
+ dma_addr_t *fiforeg,
+ unsigned int *reqsel)
{
int channel;
u32 reg, val;
};
extern int tegra30_ahub_allocate_rx_fifo(enum tegra30_ahub_rxcif *rxcif,
- unsigned long *fiforeg,
- unsigned long *reqsel);
+ dma_addr_t *fiforeg,
+ unsigned int *reqsel);
extern int tegra30_ahub_enable_rx_fifo(enum tegra30_ahub_rxcif rxcif);
extern int tegra30_ahub_disable_rx_fifo(enum tegra30_ahub_rxcif rxcif);
extern int tegra30_ahub_free_rx_fifo(enum tegra30_ahub_rxcif rxcif);
extern int tegra30_ahub_allocate_tx_fifo(enum tegra30_ahub_txcif *txcif,
- unsigned long *fiforeg,
- unsigned long *reqsel);
+ dma_addr_t *fiforeg,
+ unsigned int *reqsel);
extern int tegra30_ahub_enable_tx_fifo(enum tegra30_ahub_txcif txcif);
extern int tegra30_ahub_disable_tx_fifo(enum tegra30_ahub_txcif txcif);
extern int tegra30_ahub_free_tx_fifo(enum tegra30_ahub_txcif txcif);
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/soc.h>
+#include <sound/dmaengine_pcm.h>
#include "tegra30_ahub.h"
#include "tegra30_i2s.h"
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
ret = tegra30_ahub_allocate_tx_fifo(&i2s->playback_fifo_cif,
&i2s->playback_dma_data.addr,
- &i2s->playback_dma_data.req_sel);
- i2s->playback_dma_data.wrap = 4;
- i2s->playback_dma_data.width = 32;
+ &i2s->playback_dma_data.slave_id);
+ i2s->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
+ i2s->playback_dma_data.maxburst = 4;
tegra30_ahub_set_rx_cif_source(i2s->playback_i2s_cif,
i2s->playback_fifo_cif);
} else {
ret = tegra30_ahub_allocate_rx_fifo(&i2s->capture_fifo_cif,
&i2s->capture_dma_data.addr,
- &i2s->capture_dma_data.req_sel);
- i2s->capture_dma_data.wrap = 4;
- i2s->capture_dma_data.width = 32;
+ &i2s->capture_dma_data.slave_id);
+ i2s->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
+ i2s->capture_dma_data.maxburst = 4;
tegra30_ahub_set_rx_cif_source(i2s->capture_fifo_cif,
i2s->capture_i2s_cif);
}
struct clk *clk_i2s;
enum tegra30_ahub_txcif capture_i2s_cif;
enum tegra30_ahub_rxcif capture_fifo_cif;
- struct tegra_pcm_dma_params capture_dma_data;
+ struct snd_dmaengine_dai_dma_data capture_dma_data;
enum tegra30_ahub_rxcif playback_i2s_cif;
enum tegra30_ahub_txcif playback_fifo_cif;
- struct tegra_pcm_dma_params playback_dma_data;
+ struct snd_dmaengine_dai_dma_data playback_dma_data;
struct regmap *regmap;
};
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct device *dev = rtd->platform->dev;
struct dma_chan *chan = snd_dmaengine_pcm_get_chan(substream);
- struct tegra_pcm_dma_params *dmap;
struct dma_slave_config slave_config;
int ret;
- dmap = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream);
-
ret = snd_hwparams_to_dma_slave_config(substream, params,
&slave_config);
if (ret) {
return ret;
}
- if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
- slave_config.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
- slave_config.dst_addr = dmap->addr;
- slave_config.dst_maxburst = 4;
- } else {
- slave_config.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
- slave_config.src_addr = dmap->addr;
- slave_config.src_maxburst = 4;
- }
- slave_config.slave_id = dmap->req_sel;
+ snd_dmaengine_pcm_set_config_from_dai_data(substream,
+ snd_soc_dai_get_dma_data(rtd->cpu_dai, substream),
+ &slave_config);
ret = dmaengine_slave_config(chan, &slave_config);
if (ret < 0) {
#ifndef __TEGRA_PCM_H__
#define __TEGRA_PCM_H__
-struct tegra_pcm_dma_params {
- unsigned long addr;
- unsigned long wrap;
- unsigned long width;
- unsigned long req_sel;
-};
-
int tegra_pcm_platform_register(struct device *dev);
void tegra_pcm_platform_unregister(struct device *dev);