ARM: dts: imx6: phyFLEX: set nodes in alphabetical order

The gmpi and fec node were not in alphabatical order.

Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

diff --git a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
index ab3b1f9eec6e87af627c15bb0fae0e659e5f2841..585b823eb0e07eb3a423acfd83578888d95183aa 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
@@ -78,6 +78,22 @@
        };
 };
 
+&fec {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_enet>;
+       phy-mode = "rgmii";
+       phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
+       phy-supply = <&vdd_eth_io_reg>;
+       status = "disabled";
+};
+
+&gpmi {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_gpmi_nand>;
+       nand-on-flash-bbt;
+       status = "disabled";
+};
+
 &i2c1 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_i2c1>;
@@ -337,22 +353,6 @@
        };
 };
 
-&fec {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_enet>;
-       phy-mode = "rgmii";
-       phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
-       phy-supply = <&vdd_eth_io_reg>;
-       status = "disabled";
-};
-
-&gpmi {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_gpmi_nand>;
-       nand-on-flash-bbt;
-       status = "disabled";
-};
-
 &uart3 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_uart3>;