drm/i915: Use atomic state for calculating DVO_2X_MODE on i830.

This is a small behavioral change because it leaves DVO_2X_MODE
set between crtc_disable and crtc_enable. This is probably harmless
though and if not should be fixed by calculating 2x mode before
enable/disable pll.

This is needed because intel_crtc->active will be removed eventually.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index cd9a7545b0d3b65083c212e0d36329fdf5e04a2e..28fc3efa95eda33516eab2a888c8f6f42a475be7 100644 (file)
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1698,7 +1698,7 @@ static int intel_num_dvo_pipes(struct drm_device *dev)
        int count = 0;
 
        for_each_intel_crtc(dev, crtc)
-               count += crtc->active &&
+               count += crtc->base.state->active &&
                        intel_pipe_has_type(crtc, INTEL_OUTPUT_DVO);
 
        return count;
@@ -1779,7 +1779,7 @@ static void i9xx_disable_pll(struct intel_crtc *crtc)
        /* Disable DVO 2x clock on both PLLs if necessary */
        if (IS_I830(dev) &&
            intel_pipe_has_type(crtc, INTEL_OUTPUT_DVO) &&
-           intel_num_dvo_pipes(dev) == 1) {
+           !intel_num_dvo_pipes(dev)) {
                I915_WRITE(DPLL(PIPE_B),
                           I915_READ(DPLL(PIPE_B)) & ~DPLL_DVO_2X_MODE);
                I915_WRITE(DPLL(PIPE_A),