#define EMEV2_SCU_BASE 0x1e000000
+static void __iomem *shmobile_scu_base;
+
static DEFINE_SPINLOCK(scu_lock);
-static void __iomem *scu_base;
static void modify_scu_cpu_psr(unsigned long set, unsigned long clr)
{
/* we assume this code is running on a different cpu
* than the one that is changing coherency setting */
spin_lock(&scu_lock);
- tmp = readl(scu_base + 8);
+ tmp = readl(shmobile_scu_base + 8);
tmp &= ~clr;
tmp |= set;
- writel(tmp, scu_base + 8);
+ writel(tmp, shmobile_scu_base + 8);
spin_unlock(&scu_lock);
}
{
int cpu = cpu_logical_map(0);
- scu_enable(scu_base);
+ scu_enable(shmobile_scu_base);
/* Tell ROM loader about our vector (in headsmp.S) */
emev2_set_boot_vector(__pa(shmobile_secondary_vector));
{
unsigned int ncores;
- if (!scu_base) {
- scu_base = ioremap(EMEV2_SCU_BASE, PAGE_SIZE);
+ if (!shmobile_scu_base) {
+ shmobile_scu_base = ioremap(EMEV2_SCU_BASE, PAGE_SIZE);
emev2_clock_init(); /* need ioremapped SMU */
}
- ncores = scu_base ? scu_get_core_count(scu_base) : 1;
+ ncores = shmobile_scu_base ? scu_get_core_count(shmobile_scu_base) : 1;
shmobile_smp_init_cpus(ncores);
}