drm/i915: hsw backlight registers need transcoder instead of pipe

v2: Make TRANSCODER_EDP handling more explicit. (Imre)

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 60e0e19373b146850a9a7c616596deeff85ba797..e79669fa9fe2ecd4f1a963bbbc742fc8eccca242 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -2087,6 +2087,10 @@
 #define   BLM_PIPE_A                   (0 << 29)
 #define   BLM_PIPE_B                   (1 << 29)
 #define   BLM_PIPE_C                   (2 << 29) /* ivb + */
+#define   BLM_TRANSCODER_A             BLM_PIPE_A /* hsw */
+#define   BLM_TRANSCODER_B             BLM_PIPE_B
+#define   BLM_TRANSCODER_C             BLM_PIPE_C
+#define   BLM_TRANSCODER_EDP           (3 << 29)
 #define   BLM_PIPE(pipe)               ((pipe) << 29)
 #define   BLM_POLARITY_I965            (1 << 28) /* gen4 only */
 #define   BLM_PHASE_IN_INTERUPT_STATUS (1 << 26)

diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
index 5d3e9d7d51a7ab02d577df194246dd7739774b25..7f6141d9a06d7e607268b5da25807bf34a087665 100644 (file)
--- a/drivers/gpu/drm/i915/intel_panel.c
+++ b/drivers/gpu/drm/i915/intel_panel.c
@@ -344,6 +344,8 @@ void intel_panel_enable_backlight(struct drm_device *dev,
                                  enum pipe pipe)
 {
        struct drm_i915_private *dev_priv = dev->dev_private;
+       enum transcoder cpu_transcoder =
+               intel_pipe_to_cpu_transcoder(dev_priv, pipe);
        unsigned long flags;
 
        spin_lock_irqsave(&dev_priv->backlight.lock, flags);
@@ -374,7 +376,10 @@ void intel_panel_enable_backlight(struct drm_device *dev,
                else
                        tmp &= ~BLM_PIPE_SELECT;
 
-               tmp |= BLM_PIPE(pipe);
+               if (cpu_transcoder == TRANSCODER_EDP)
+                       tmp |= BLM_TRANSCODER_EDP;
+               else
+                       tmp |= BLM_PIPE(cpu_transcoder);
                tmp &= ~BLM_PWM_ENABLE;
 
                I915_WRITE(reg, tmp);