return ret ? false : !!ret_val;
}
-int __qcom_scm_pas_init_image(u32 peripheral, const void *metadata, size_t size)
+int __qcom_scm_pas_init_image(struct device *dev, u32 peripheral, const void *metadata, size_t size)
{
dma_addr_t mdata_phys;
void *mdata_buf;
* data blob, so make sure it's physically contiguous, 4K aligned and
* non-cachable to avoid XPU violations.
*/
- mdata_buf = dma_alloc_coherent(NULL, size, &mdata_phys, GFP_KERNEL);
+ mdata_buf = dma_alloc_coherent(dev, size, &mdata_phys, GFP_KERNEL);
if (!mdata_buf) {
pr_err("Allocation of metadata buffer failed.\n");
return -ENOMEM;
&request, sizeof(request),
&scm_ret, sizeof(scm_ret));
- dma_free_coherent(NULL, size, mdata_buf, mdata_phys);
+ dma_free_coherent(dev, size, mdata_buf, mdata_phys);
return ret ? : scm_ret;
}
* 02110-1301, USA.
*/
+#include <linux/platform_device.h>
#include <linux/cpumask.h>
#include <linux/delay.h>
#include <linux/mutex.h>
return ret ? false : !!desc.ret[0];
}
-int __qcom_scm_pas_init_image(u32 peripheral, const void *metadata, size_t size)
+int __qcom_scm_pas_init_image(struct device *dev, u32 peripheral, const void *metadata, size_t size)
{
int ret;
struct qcom_scm_desc desc = {0};
dma_addr_t mdata_phys;
void *mdata_buf;
+dev->coherent_dma_mask = DMA_BIT_MASK(sizeof(dma_addr_t) * 8);
+
/*
* During the scm call memory protection will be enabled for the meta
* data blob, so make sure it's physically contiguous, 4K aligned and
* non-cachable to avoid XPU violations.
*/
- mdata_buf = dma_alloc_coherent(NULL, size, &mdata_phys, GFP_KERNEL);
+ mdata_buf = dma_alloc_coherent(dev, size, &mdata_phys, GFP_KERNEL);
if (!mdata_buf) {
pr_err("Allocation of metadata buffer failed.\n");
return -ENOMEM;
&desc);
scm_ret = desc.ret[0];
- dma_free_coherent(NULL, size, mdata_buf, mdata_phys);
+ dma_free_coherent(dev, size, mdata_buf, mdata_phys);
return ret ? : scm_ret;
}
* 02110-1301, USA.
*/
+#include <linux/platform_device.h>
#include <linux/cpumask.h>
#include <linux/export.h>
#include <linux/types.h>
*
* Returns 0 on success.
*/
-int qcom_scm_pas_init_image(u32 peripheral, const void *metadata, size_t size)
+int qcom_scm_pas_init_image(struct device *dev, u32 peripheral, const void *metadata, size_t size)
{
- return __qcom_scm_pas_init_image(peripheral, metadata, size);
+ return __qcom_scm_pas_init_image(dev, peripheral, metadata, size);
}
EXPORT_SYMBOL(qcom_scm_pas_init_image);
#define QCOM_SCM_PAS_SHUTDOWN_CMD 0x6
#define QCOM_SCM_PAS_IS_SUPPORTED_CMD 0x7
extern bool __qcom_scm_pas_supported(u32 peripheral);
-extern int __qcom_scm_pas_init_image(u32 peripheral, const void *metadata, size_t size);
+extern int __qcom_scm_pas_init_image(struct device *dev, u32 peripheral, const void *metadata, size_t size);
extern int __qcom_scm_pas_mem_setup(u32 peripheral, phys_addr_t addr, phys_addr_t size);
extern int __qcom_scm_pas_auth_and_reset(u32 peripheral);
extern int __qcom_scm_pas_shutdown(u32 peripheral);
#ifndef __QCOM_SCM_H
#define __QCOM_SCM_H
+#include <linux/platform_device.h>
+
extern int qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus);
extern int qcom_scm_set_warm_boot_addr(void *entry, const cpumask_t *cpus);
u32 *resp);
extern bool qcom_scm_pas_supported(u32 peripheral);
-extern int qcom_scm_pas_init_image(u32 peripheral, const void *metadata, size_t size);
+extern int qcom_scm_pas_init_image(struct device *dev, u32 peripheral, const void *metadata, size_t size);
extern int qcom_scm_pas_mem_setup(u32 peripheral, phys_addr_t addr, phys_addr_t size);
extern int qcom_scm_pas_auth_and_reset(u32 peripheral);
extern int qcom_scm_pas_shutdown(u32 peripheral);