]> git.karo-electronics.de Git - linux-beck.git/commitdiff
usb: musb: dsps: Add the sw_babble_control() and Enable for newer silicon
authorGeorge Cherian <george.cherian@ti.com>
Wed, 16 Jul 2014 12:52:12 +0000 (18:22 +0530)
committerFelipe Balbi <balbi@ti.com>
Wed, 16 Jul 2014 15:00:02 +0000 (10:00 -0500)
Add sw_babble_control() logic to differentiate between transient
babble and real babble condition. Also add the SW babble control
register definitions.

Babble control register logic is implemented in the latest
revision of AM335x.

Find whether we are running on newer silicon. The babble control
register reads 0x4 by default in newer silicon as opposed to 0
in old versions of AM335x. Based on this enable the sw babble
control logic.

Signed-off-by: George Cherian <george.cherian@ti.com>
Tested-by: Bin Liu <b-liu@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
drivers/usb/musb/musb_dsps.c
drivers/usb/musb/musb_regs.h

index 53a4351aef972e7648e6894951c975e17d8094d8..f119a62140efe9cd18fd44f9b1deef27e3b98b70 100644 (file)
@@ -144,6 +144,7 @@ struct dsps_glue {
        const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */
        struct timer_list timer;        /* otg_workaround timer */
        unsigned long last_timer;    /* last timer data for each instance */
+       bool sw_babble_enabled;
 
        struct dsps_context context;
        struct debugfs_regset32 regset;
@@ -477,6 +478,19 @@ static int dsps_musb_init(struct musb *musb)
        val &= ~(1 << wrp->otg_disable);
        dsps_writel(musb->ctrl_base, wrp->phy_utmi, val);
 
+       /*
+        *  Check whether the dsps version has babble control enabled.
+        * In latest silicon revision the babble control logic is enabled.
+        * If MUSB_BABBLE_CTL returns 0x4 then we have the babble control
+        * logic enabled.
+        */
+       val = dsps_readb(musb->mregs, MUSB_BABBLE_CTL);
+       if (val == MUSB_BABBLE_RCV_DISABLE) {
+               glue->sw_babble_enabled = true;
+               val |= MUSB_BABBLE_SW_SESSION_CTRL;
+               dsps_writeb(musb->mregs, MUSB_BABBLE_CTL, val);
+       }
+
        ret = dsps_musb_dbg_init(musb, glue);
        if (ret)
                return ret;
@@ -544,19 +558,82 @@ static int dsps_musb_set_mode(struct musb *musb, u8 mode)
        return 0;
 }
 
+static bool  sw_babble_control(struct musb *musb)
+{
+       u8 babble_ctl;
+       bool session_restart =  false;
+
+       babble_ctl = dsps_readb(musb->mregs, MUSB_BABBLE_CTL);
+       dev_dbg(musb->controller, "babble: MUSB_BABBLE_CTL value %x\n",
+               babble_ctl);
+       /*
+        * check line monitor flag to check whether babble is
+        * due to noise
+        */
+       dev_dbg(musb->controller, "STUCK_J is %s\n",
+               babble_ctl & MUSB_BABBLE_STUCK_J ? "set" : "reset");
+
+       if (babble_ctl & MUSB_BABBLE_STUCK_J) {
+               int timeout = 10;
+
+               /*
+                * babble is due to noise, then set transmit idle (d7 bit)
+                * to resume normal operation
+                */
+               babble_ctl = dsps_readb(musb->mregs, MUSB_BABBLE_CTL);
+               babble_ctl |= MUSB_BABBLE_FORCE_TXIDLE;
+               dsps_writeb(musb->mregs, MUSB_BABBLE_CTL, babble_ctl);
+
+               /* wait till line monitor flag cleared */
+               dev_dbg(musb->controller, "Set TXIDLE, wait J to clear\n");
+               do {
+                       babble_ctl = dsps_readb(musb->mregs, MUSB_BABBLE_CTL);
+                       udelay(1);
+               } while ((babble_ctl & MUSB_BABBLE_STUCK_J) && timeout--);
+
+               /* check whether stuck_at_j bit cleared */
+               if (babble_ctl & MUSB_BABBLE_STUCK_J) {
+                       /*
+                        * real babble condition has occurred
+                        * restart the controller to start the
+                        * session again
+                        */
+                       dev_dbg(musb->controller, "J not cleared, misc (%x)\n",
+                               babble_ctl);
+                       session_restart = true;
+               }
+       } else {
+               session_restart = true;
+       }
+
+       return session_restart;
+}
+
 static int dsps_musb_reset(struct musb *musb)
 {
        struct device *dev = musb->controller;
        struct dsps_glue *glue = dev_get_drvdata(dev->parent);
        const struct dsps_musb_wrapper *wrp = glue->wrp;
+       int session_restart = 0;
 
-       dsps_writel(musb->ctrl_base, wrp->control, (1 << wrp->reset));
-       usleep_range(100, 200);
-       usb_phy_shutdown(musb->xceiv);
-       usleep_range(100, 200);
-       usb_phy_init(musb->xceiv);
+       if (glue->sw_babble_enabled)
+               session_restart = sw_babble_control(musb);
+       /*
+        * In case of new silicon version babble condition can be recovered
+        * without resetting the MUSB. But for older silicon versions, MUSB
+        * reset is needed
+        */
+       if (session_restart || !glue->sw_babble_enabled) {
+               dev_info(musb->controller, "Restarting MUSB to recover from Babble\n");
+               dsps_writel(musb->ctrl_base, wrp->control, (1 << wrp->reset));
+               usleep_range(100, 200);
+               usb_phy_shutdown(musb->xceiv);
+               usleep_range(100, 200);
+               usb_phy_init(musb->xceiv);
+               session_restart = 1;
+       }
 
-       return 0;
+       return !session_restart;
 }
 
 static struct musb_platform_ops dsps_ops = {
index 03f2655af290758cb708a67f832abd6257df2894..b9bcda5e39453791bf6b60aa4ffc8a7cfab4cf73 100644 (file)
 #define MUSB_DEVCTL_HR         0x02
 #define MUSB_DEVCTL_SESSION    0x01
 
+/* BABBLE_CTL */
+#define MUSB_BABBLE_FORCE_TXIDLE       0x80
+#define MUSB_BABBLE_SW_SESSION_CTRL    0x40
+#define MUSB_BABBLE_STUCK_J            0x20
+#define MUSB_BABBLE_RCV_DISABLE                0x04
+
 /* MUSB ULPI VBUSCONTROL */
 #define MUSB_ULPI_USE_EXTVBUS  0x01
 #define MUSB_ULPI_USE_EXTVBUSIND 0x02
  */
 
 #define MUSB_DEVCTL            0x60    /* 8 bit */
+#define MUSB_BABBLE_CTL                0x61    /* 8 bit */
 
 /* These are always controlled through the INDEX register */
 #define MUSB_TXFIFOSZ          0x62    /* 8-bit (see masks) */