[NISTC_INTB2_ENA_REG] = { 0, 0 }, /* E-Series only */
[NISTC_AI_PERSONAL_REG] = { 0x19a, 2 },
[NISTC_AO_PERSONAL_REG] = { 0x19c, 2 },
- [RTSI_Trig_A_Output_Register] = { 0x19e, 2 },
- [RTSI_Trig_B_Output_Register] = { 0x1a0, 2 },
+ [NISTC_RTSI_TRIGA_OUT_REG] = { 0x19e, 2 },
+ [NISTC_RTSI_TRIGB_OUT_REG] = { 0x1a0, 2 },
[RTSI_Board_Register] = { 0, 0 }, /* Unknown */
[Configuration_Memory_Clear] = { 0x1a4, 2 },
[ADC_FIFO_Clear] = { 0x1a6, 2 },
}
static int ni_set_rtsi_routing(struct comedi_device *dev,
- unsigned chan, unsigned source)
+ unsigned chan, unsigned src)
{
struct ni_private *devpriv = dev->private;
- if (ni_valid_rtsi_output_source(dev, chan, source) == 0)
+ if (ni_valid_rtsi_output_source(dev, chan, src) == 0)
return -EINVAL;
if (chan < 4) {
- devpriv->rtsi_trig_a_output_reg &= ~RTSI_Trig_Output_Mask(chan);
- devpriv->rtsi_trig_a_output_reg |=
- RTSI_Trig_Output_Bits(chan, source);
+ devpriv->rtsi_trig_a_output_reg &= ~NISTC_RTSI_TRIG_MASK(chan);
+ devpriv->rtsi_trig_a_output_reg |= NISTC_RTSI_TRIG(chan, src);
ni_stc_writew(dev, devpriv->rtsi_trig_a_output_reg,
- RTSI_Trig_A_Output_Register);
+ NISTC_RTSI_TRIGA_OUT_REG);
} else if (chan < 8) {
- devpriv->rtsi_trig_b_output_reg &= ~RTSI_Trig_Output_Mask(chan);
- devpriv->rtsi_trig_b_output_reg |=
- RTSI_Trig_Output_Bits(chan, source);
+ devpriv->rtsi_trig_b_output_reg &= ~NISTC_RTSI_TRIG_MASK(chan);
+ devpriv->rtsi_trig_b_output_reg |= NISTC_RTSI_TRIG(chan, src);
ni_stc_writew(dev, devpriv->rtsi_trig_b_output_reg,
- RTSI_Trig_B_Output_Register);
+ NISTC_RTSI_TRIGB_OUT_REG);
}
return 2;
}
struct ni_private *devpriv = dev->private;
if (chan < 4) {
- return RTSI_Trig_Output_Source(chan,
- devpriv->rtsi_trig_a_output_reg);
+ return NISTC_RTSI_TRIG_TO_SRC(chan,
+ devpriv->rtsi_trig_a_output_reg);
} else if (chan < NISTC_RTSI_TRIG_NUM_CHAN(devpriv->is_m_series)) {
- return RTSI_Trig_Output_Source(chan,
- devpriv->rtsi_trig_b_output_reg);
+ return NISTC_RTSI_TRIG_TO_SRC(chan,
+ devpriv->rtsi_trig_b_output_reg);
} else {
if (chan == NISTC_RTSI_TRIG_OLD_CLK_CHAN)
return NI_RTSI_OUTPUT_RTSI_OSC;
dev_err(dev->class_dev, "ni_set_master_clock failed, bug?\n");
/* default internal lines routing to RTSI bus lines */
devpriv->rtsi_trig_a_output_reg =
- RTSI_Trig_Output_Bits(0,
- NI_RTSI_OUTPUT_ADR_START1) |
- RTSI_Trig_Output_Bits(1,
- NI_RTSI_OUTPUT_ADR_START2) |
- RTSI_Trig_Output_Bits(2,
- NI_RTSI_OUTPUT_SCLKG) |
- RTSI_Trig_Output_Bits(3, NI_RTSI_OUTPUT_DACUPDN);
+ NISTC_RTSI_TRIG(0, NI_RTSI_OUTPUT_ADR_START1) |
+ NISTC_RTSI_TRIG(1, NI_RTSI_OUTPUT_ADR_START2) |
+ NISTC_RTSI_TRIG(2, NI_RTSI_OUTPUT_SCLKG) |
+ NISTC_RTSI_TRIG(3, NI_RTSI_OUTPUT_DACUPDN);
ni_stc_writew(dev, devpriv->rtsi_trig_a_output_reg,
- RTSI_Trig_A_Output_Register);
+ NISTC_RTSI_TRIGA_OUT_REG);
devpriv->rtsi_trig_b_output_reg =
- RTSI_Trig_Output_Bits(4,
- NI_RTSI_OUTPUT_DA_START1) |
- RTSI_Trig_Output_Bits(5,
- NI_RTSI_OUTPUT_G_SRC0) |
- RTSI_Trig_Output_Bits(6, NI_RTSI_OUTPUT_G_GATE0);
+ NISTC_RTSI_TRIG(4, NI_RTSI_OUTPUT_DA_START1) |
+ NISTC_RTSI_TRIG(5, NI_RTSI_OUTPUT_G_SRC0) |
+ NISTC_RTSI_TRIG(6, NI_RTSI_OUTPUT_G_GATE0);
if (devpriv->is_m_series)
devpriv->rtsi_trig_b_output_reg |=
- RTSI_Trig_Output_Bits(7, NI_RTSI_OUTPUT_RTSI_OSC);
+ NISTC_RTSI_TRIG(7, NI_RTSI_OUTPUT_RTSI_OSC);
ni_stc_writew(dev, devpriv->rtsi_trig_b_output_reg,
- RTSI_Trig_B_Output_Register);
+ NISTC_RTSI_TRIGB_OUT_REG);
/*
* Sets the source and direction of the 4 on board lines
#define NISTC_AO_PERSONAL_BC_SRC_SEL BIT(4)
#define NISTC_AO_PERSONAL_INTERVAL_BUFFER_MODE BIT(3)
+#define NISTC_RTSI_TRIGA_OUT_REG 79
+#define NISTC_RTSI_TRIGB_OUT_REG 80
+#define NISTC_RTSI_TRIGB_SUB_SEL1 BIT(15) /* not for M-Series */
+#define NISTC_RTSI_TRIG(_c, _s) (((_s) & 0xf) << (((_c) % 4) * 4))
+#define NISTC_RTSI_TRIG_MASK(_c) NISTC_RTSI_TRIG((_c), 0xf)
+#define NISTC_RTSI_TRIG_TO_SRC(_c, _b) (((_b) >> (((_c) % 4) * 4)) & 0xf)
+
#define AI_Status_1_Register 2
#define Interrupt_A_St 0x8000
#define AI_FIFO_Full_St 0x4000
#define AO_BC_Save_Registers 18
#define AO_UC_Save_Registers 20
-#define RTSI_Trig_A_Output_Register 79
-#define RTSI_Trig_B_Output_Register 80
-enum RTSI_Trig_B_Output_Bits {
- RTSI_Sub_Selection_1_Bit = 0x8000 /* not for m-series */
-};
-static inline unsigned RTSI_Trig_Output_Bits(unsigned rtsi_channel,
- unsigned source)
-{
- return (source & 0xf) << ((rtsi_channel % 4) * 4);
-};
-
-static inline unsigned RTSI_Trig_Output_Mask(unsigned rtsi_channel)
-{
- return 0xf << ((rtsi_channel % 4) * 4);
-};
-
-/* inverse to RTSI_Trig_Output_Bits() */
-static inline unsigned RTSI_Trig_Output_Source(unsigned rtsi_channel,
- unsigned bits)
-{
- return (bits >> ((rtsi_channel % 4) * 4)) & 0xf;
-};
-
#define RTSI_Board_Register 81
#define Write_Strobe_0_Register 82
#define Write_Strobe_1_Register 83