struct dtv_frontend_properties *c = &fe->dtv_property_cache;
int ret, i;
u32 if_frequency;
+ u64 tmp;
u8 delivery_system_val, if_val[3], bw_val[7];
dev_dbg(&client->dev,
case SYS_DVBT2:
if (c->bandwidth_hz <= 6000000) {
/* IF 3570000 Hz, BW 6000000 Hz */
- memcpy(if_val, "\x24\x8e\x8a", 3);
memcpy(bw_val, "\xe9\x55\x55\x1c\x29\x1c\x29", 7);
} else if (c->bandwidth_hz <= 7000000) {
/* IF 4570000 Hz, BW 7000000 Hz */
- memcpy(if_val, "\x2e\xcb\xfb", 3);
memcpy(bw_val, "\xc8\x00\x00\x17\x0a\x17\x0a", 7);
} else if (c->bandwidth_hz <= 8000000) {
/* IF 4570000 Hz, BW 8000000 Hz */
- memcpy(if_val, "\x2e\xcb\xfb", 3);
memcpy(bw_val, "\xaf\x00\x00\x11\xec\x11\xec", 7);
} else {
ret = -EINVAL;
break;
case SYS_DVBC_ANNEX_A:
/* IF 5070000 Hz, BW 8000000 Hz */
- memcpy(if_val, "\x33\xea\xb3", 3);
memcpy(bw_val, "\xaf\x00\x00\x11\xec\x11\xec", 7);
break;
default:
if_frequency = 0;
}
- switch (if_frequency) {
- case 3570000:
- case 4570000:
- case 5070000:
- break;
- default:
- dev_err(&client->dev, "IF frequency %d not supported\n",
- if_frequency);
- ret = -EINVAL;
- goto err;
- }
+ /* Calculate IF registers ( (1<<24)*IF / Xtal ) */
+ tmp = div_u64(if_frequency * (u64)(1<<24) + (dev->xtal / 2),
+ dev->xtal);
+ if_val[0] = ((tmp >> 16) & 0xff);
+ if_val[1] = ((tmp >> 8) & 0xff);
+ if_val[2] = ((tmp >> 0) & 0xff);
ret = regmap_write(dev->regmap[2], 0x05, 0x00);
ret = regmap_write(dev->regmap[2], 0xfb, 0x13);
}
dev->i2c_wr_max = config->i2c_wr_max;
+ if (!config->xtal)
+ dev->xtal = 25000000;
+ else
+ dev->xtal = config->xtal;
dev->client[0] = client;
dev->regmap[0] = regmap_init_i2c(dev->client[0], ®map_config);
if (IS_ERR(dev->regmap[0])) {