#define UART_EXAR654_ENHANCED_REGISTER_SET 0xBF
-#define UART_16654_FCR_TXTRIGGER_8 0x0
#define UART_16654_FCR_TXTRIGGER_16 0x10
-#define UART_16654_FCR_TXTRIGGER_32 0x20
-#define UART_16654_FCR_TXTRIGGER_56 0x30
-
-#define UART_16654_FCR_RXTRIGGER_8 0x0
#define UART_16654_FCR_RXTRIGGER_16 0x40
#define UART_16654_FCR_RXTRIGGER_56 0x80
-#define UART_16654_FCR_RXTRIGGER_60 0xC0
/* Received CTS/RTS change of state */
#define UART_IIR_CTSRTS 0x20
#define UART_EXAR654_EFR_IXOFF 0x8 /* Transmit Xon1/Xoff1 */
#define UART_EXAR654_EFR_RTSDTR 0x40 /* Auto RTS/DTR Flow Control Enable */
#define UART_EXAR654_EFR_CTSDSR 0x80 /* Auto CTS/DSR Flow COntrol Enable */
-
-/* Indicates whether chip saw an incoming XOFF char */
-#define UART_EXAR654_XOFF_DETECT 0x1
-
-/* Indicates whether chip saw an incoming XON char */
-#define UART_EXAR654_XON_DETECT 0x2
-
#define UART_EXAR654_IER_XOFF 0x20 /* Xoff Interrupt Enable */
#define UART_EXAR654_IER_RTSDTR 0x40 /* Output Interrupt Enable */
#define UART_EXAR654_IER_CTSDSR 0x80 /* Input Interrupt Enable */